Shim; Dae-Yun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shim; Dae-Yun.The latest application filed is for "adaptive equalizer for controlling operation thereof by using sign and absolute value of output signal thereof".

Company Profile

0.7.5

Shim; Dae-Yun - Gwangmyung KR
Shim; Dae-yun - Kwangmyoung KR
Shim; Dae-yun - Kwangmyung KR
Shim, Dae-Yun - Gwangmyung-City KR
Shim, Dae-Yun - Kwangmyung-city KR
Shim, Dae-yun - Kwangmyoung-city KR
Shim, Dae-yun - Kwangmyong-city KR
Shim; Dae-yun - Kyungki-do KR
Shim; Dae-yun - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Adaptive equalizer for controlling operation thereof by using sign and absolute value of output signal thereof Grant 7,184,476 - Lee , et al. February 27, 2	2007-02-27
Device and method for detecting a period of an input signal Grant 6,965,659 - Lee , et al. November 15, 2	2005-11-15
Phase blender and multi-phase generator using the same Grant 6,617,909 - Shim September 9, 2	2003-09-09
Adaptive equalizer for controlling operation thereof by using sign and absolute value of output signal thereof App 20030108097 - Lee, Jae-Wook ; et al.	2003-06-12
Phase blender and multi-phase generator using the same App 20020140491 - Shim, Dae-Yun	2002-10-03
Clock synchronization circuit and semiconductor device having the same Grant 6,385,126 - Jung , et al. May 7, 2	2002-05-07
Device and method for detecting a period of an input signal App 20020025013 - Lee, Jae-wook ; et al.	2002-02-28
Clock generating circuit for compensation of delay difference using closed loop analog synchronous mirror delay structure App 20010022522 - Shim, Dae-yun ; et al.	2001-09-20
Clock synchronization circuit and semiconductor device having the same App 20010009275 - Jung, Yeon-jae ; et al.	2001-07-26
Clock generating circuits that utilize analog pump signals to provide fast synchronization and reduced delay skew Grant 6,141,292 - Lee , et al. October 31, 2	2000-10-31
Memory interfacing method and circuit of variable length decoder for accessing external memory when empty portion of internal memory exceeds a predetermined level Grant 5,822,770 - Shim October 13, 1	1998-10-13
Method of converting data outputting sequence in inverse DCT and circuit thereof Grant 5,805,483 - Shim September 8, 1	1998-09-08

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