loadpatents
Patent applications and USPTO patent grants for Shieh; Jyu-Horng.The latest application filed is for "method of forming a semiconductor device".
Patent | Date |
---|---|
Integrated circuit and method for manufacturing the same Grant 11,456,210 - Huang , et al. September 27, 2 | 2022-09-27 |
Method Of Forming A Semiconductor Device App 20220262674 - Su; Yi-Nien ;   et al. | 2022-08-18 |
DC bias in plasma process Grant 11,404,245 - Pan , et al. August 2, 2 | 2022-08-02 |
Method and apparatus for back end of line semiconductor device processing Grant 11,398,405 - Wu , et al. July 26, 2 | 2022-07-26 |
Integrated Circuit App 20220190237 - PENG; Tai-Yen ;   et al. | 2022-06-16 |
Method of forming a semiconductor device Grant 11,322,393 - Su , et al. May 3, 2 | 2022-05-03 |
Integrated Circuit And Method For Manufacturing The Same App 20220115266 - HUANG; KUAN-WEI ;   et al. | 2022-04-14 |
Self-Aligned Via Formation Using Spacers App 20220102212 - Su; Yi-Nien ;   et al. | 2022-03-31 |
Middle-Of-Line Interconnect Structure Having Air Gap And Method Of Fabrication Thereof App 20220102192 - Su; Yi-Nien ;   et al. | 2022-03-31 |
Integrated circuit Grant 11,271,150 - Peng , et al. March 8, 2 | 2022-03-08 |
Method of forming an interconnect structure of a semiconductor device Grant 11,217,476 - Peng , et al. January 4, 2 | 2022-01-04 |
Metal Etching Stop Layer in Magnetic Tunnel Junction Memory Cells App 20210384418 - Peng; Tai-Yen ;   et al. | 2021-12-09 |
Double patterning method Grant 11,177,138 - Lee , et al. November 16, 2 | 2021-11-16 |
Integrated Circuit Structure App 20210343937 - PENG; Tai-Yen ;   et al. | 2021-11-04 |
Semiconductor Device With Magnetic Tunnel Junctions App 20210313396 - Peng; Tai-Yen ;   et al. | 2021-10-07 |
Contact plug without seam hole and methods of forming the same Grant 11,127,630 - Ting , et al. September 21, 2 | 2021-09-21 |
Metal etching stop layer in magnetic tunnel junction memory cells Grant 11,101,429 - Peng , et al. August 24, 2 | 2021-08-24 |
Semiconductor device Grant 11,063,217 - Peng , et al. July 13, 2 | 2021-07-13 |
Method of preventing pattern collapse Grant 11,043,453 - Ting , et al. June 22, 2 | 2021-06-22 |
Semiconductor device with magnetic tunnel junctions Grant 11,037,981 - Peng , et al. June 15, 2 | 2021-06-15 |
Double Patterning Method App 20210143020 - Lee; Chia-Ying ;   et al. | 2021-05-13 |
Method of Forming a Semiconductor Device App 20210134657 - Su; Yi-Nien ;   et al. | 2021-05-06 |
Self-aligned Double Patterning App 20210125836 - Huang; Kuan-Wei ;   et al. | 2021-04-29 |
Interconnect structure and method of forming the same Grant 10,985,054 - Chen , et al. April 20, 2 | 2021-04-20 |
Method Of Manufacturing Semiconductor Devices App 20210096473 - LIU; Ru-Gun ;   et al. | 2021-04-01 |
Gradient Protection Layer in MTJ Manufacturing App 20210098695 - Peng; Tai-Yen ;   et al. | 2021-04-01 |
Semiconductor Structure And Manufacturing Method Of The Same App 20210074909 - PENG; TAI-YEN ;   et al. | 2021-03-11 |
Gradient protection layer in MTJ manufacturing Grant 10,868,239 - Peng , et al. December 15, 2 | 2020-12-15 |
Method of forming a semiconductor device Grant 10,867,840 - Su , et al. December 15, 2 | 2020-12-15 |
Metal Contacts on Metal Gates and Methods Thereof App 20200388504 - Chang; Pang-Sheng ;   et al. | 2020-12-10 |
Semiconductor structure and manufacturing method of the same Grant 10,862,023 - Peng , et al. December 8, 2 | 2020-12-08 |
Semiconductor Device App 20200365802 - PENG; Tai-Yen ;   et al. | 2020-11-19 |
Interconnect Structure and Method of Forming the Same App 20200343128 - Chen; Jeng-Shiou ;   et al. | 2020-10-29 |
Structure And Formation Method Of Dual Damascene Structure App 20200294849 - PENG; Tai-Yen ;   et al. | 2020-09-17 |
Spacer Etching Process For Integrated Circuit Design App 20200286738 - LIU; RU-GUN ;   et al. | 2020-09-10 |
Integrated circuit and fabrication method thereof Grant 10,770,345 - Peng , et al. Sep | 2020-09-08 |
Interconnect structure and method of forming same Grant 10,755,974 - Chu , et al. A | 2020-08-25 |
Metal contacts on metal gates and methods thereof Grant 10,755,945 - Chang , et al. A | 2020-08-25 |
Integrated Circuit App 20200266340 - PENG; Tai-Yen ;   et al. | 2020-08-20 |
Memory device and fabrication method thereof Grant 10,734,580 - Peng , et al. | 2020-08-04 |
Double Patterning Method App 20200234972 - Lee; Chia-Ying ;   et al. | 2020-07-23 |
Interconnect structure and method of forming the same Grant 10,714,383 - Chen , et al. | 2020-07-14 |
Method for forming structure of dual damascene structures having via hole and trench Grant 10,672,651 - Peng , et al. | 2020-06-02 |
Spacer etching process for integrated circuit design Grant 10,665,467 - Liu , et al. | 2020-05-26 |
Double patterning method Grant 10,651,047 - Lee , et al. | 2020-05-12 |
Memory device and fabrication method thereof Grant 10,651,373 - Peng , et al. | 2020-05-12 |
Semiconductor Device With Magnetic Tunnel Junctions App 20200135806 - Peng; Tai-Yen ;   et al. | 2020-04-30 |
Gradient Protection Layer in MTJ Manufacturing App 20200136026 - Peng; Tai-Yen ;   et al. | 2020-04-30 |
Method of Preventing Pattern Collapse App 20200126913 - Ting; Chih-Yuan ;   et al. | 2020-04-23 |
Memory Device And Fabrication Method Thereof App 20200106007 - PENG; Tai-Yen ;   et al. | 2020-04-02 |
Metal Etching Stop Layer in Magnetic Tunnel Junction Memory Cells App 20200106008 - Peng; Tai-Yen ;   et al. | 2020-04-02 |
Method of Forming a Semiconductor Device App 20200105585 - Su; Yi-Nien ;   et al. | 2020-04-02 |
Dry Ashing by Secondary Excitation App 20200098588 - Kuo; Jack Kuo-Ping ;   et al. | 2020-03-26 |
Integrated Circuit And Fabrication Method Thereof App 20200066580 - PENG; Tai-Yen ;   et al. | 2020-02-27 |
Contact Plug without Seam Hole and Methods of Forming the Same App 20200051856 - Ting; Chih-Yuan ;   et al. | 2020-02-13 |
Semiconductor Structure And Manufacturing Method Of The Same App 20200035907 - PENG; TAI-YEN ;   et al. | 2020-01-30 |
Metal Contacts on Metal Gates and Methods Thereof App 20200020541 - Chang; Pang-Sheng ;   et al. | 2020-01-16 |
Integrated circuit with conductive line having line-ends Grant 10,535,556 - Ting , et al. Ja | 2020-01-14 |
Method and Apparatus for Back End of Line Semiconductor Device Processing App 20200006120 - Wu; Chung-Wen ;   et al. | 2020-01-02 |
Method and apparatus for back end of line semiconductor device processing Grant 10,522,391 - Wu , et al. Dec | 2019-12-31 |
Method of preventing pattern collapse Grant 10,515,895 - Ting , et al. Dec | 2019-12-24 |
Dry ashing by secondary excitation Grant 10,510,553 - Kuo , et al. Dec | 2019-12-17 |
Contact plug without seam hole and methods of forming the same Grant 10,504,780 - Ting , et al. Dec | 2019-12-10 |
Dry Ashing by Secondary Excitation App 20190371619 - Kuo; Jack Kuo-Ping ;   et al. | 2019-12-05 |
Interconnect Structure and Method of Forming the Same App 20190326156 - Chen; Jeng-Shiou ;   et al. | 2019-10-24 |
DC Bias in Plasma Process App 20190267211 - Pan; Sheng-Liang ;   et al. | 2019-08-29 |
Semiconductor Device and Method App 20190259661 - Chu; Ming-Hui ;   et al. | 2019-08-22 |
Memory Device And Fabrication Method Thereof App 20190252610 - PENG; Tai-Yen ;   et al. | 2019-08-15 |
Air gap structure and method Grant 10,354,949 - Ting , et al. July 16, 2 | 2019-07-16 |
Interconnect structure and method of forming the same Grant 10,290,538 - Chen , et al. | 2019-05-14 |
Memory Device And Fabrication Method Thereof App 20190131524 - PENG; Tai-Yen ;   et al. | 2019-05-02 |
Memory device and fabrication method thereof Grant 10,276,794 - Peng , et al. | 2019-04-30 |
Multi-patterning method and device formed by the method Grant 10,276,376 - Lee , et al. | 2019-04-30 |
Semiconductor device and method Grant 10,269,632 - Chu , et al. | 2019-04-23 |
Integrated Circuit with Conductive Line Having Line-Ends App 20190115250 - Ting; Chih-Yuan ;   et al. | 2019-04-18 |
Double Patterning Method App 20190051536 - Lee; Chia-Ying ;   et al. | 2019-02-14 |
Integrated circuit with conductive line having line-ends Grant 10,163,689 - Ting , et al. Dec | 2018-12-25 |
Method for manufacturing a semiconductor device Grant 10,157,775 - Chen , et al. Dec | 2018-12-18 |
Double patterning method Grant 10,109,497 - Lee , et al. October 23, 2 | 2018-10-23 |
Method For Manufacturing A Semiconductor Device App 20180294185 - CHEN; Chih-Hao ;   et al. | 2018-10-11 |
Contact Plug without Seam Hole and Methods of Forming the Same App 20180240704 - Ting; Chih-Yuan ;   et al. | 2018-08-23 |
Semiconductor device having air gap structures and method of fabricating thereof Grant 10,043,754 - Ting , et al. August 7, 2 | 2018-08-07 |
Air Gap Structure and Method App 20180174961 - Ting; Chih-Yuan ;   et al. | 2018-06-21 |
Interconnect Structure and Method of Forming the Same App 20180174886 - Chen; Jeng-Shiou ;   et al. | 2018-06-21 |
Structure Of Dual Damascene Structures Having Via Hole And Trench App 20180158722 - PENG; Tai-Yen ;   et al. | 2018-06-07 |
Air gap structure and method Grant 9,991,200 - Ting , et al. June 5, 2 | 2018-06-05 |
Contact plug without seam hole and methods of forming the same Grant 9,966,309 - Ting , et al. May 8, 2 | 2018-05-08 |
Semiconductor device having air gap structures and method of fabricating thereof Grant 9,929,094 - Ting , et al. March 27, 2 | 2018-03-27 |
Interconnect structure and method of forming the same Grant 9,892,960 - Chen , et al. February 13, 2 | 2018-02-13 |
Structure of dual damascene structures having via hole and trench Grant 9,887,126 - Peng , et al. February 6, 2 | 2018-02-06 |
Method of fine line space resolution lithography for integrated circuit features using double patterning technology Grant 9,865,500 - Lee , et al. January 9, 2 | 2018-01-09 |
Double Patterning Method App 20170309495 - Lee; Chia-Ying ;   et al. | 2017-10-26 |
Semiconductor Device and Method App 20170271205 - Chu; Ming-Hui ;   et al. | 2017-09-21 |
Method and Apparatus for Back End of Line Semiconductor Device Processing App 20170221816 - Wu; Chung-Wen ;   et al. | 2017-08-03 |
Double patterning method Grant 9,711,372 - Lee , et al. July 18, 2 | 2017-07-18 |
Method of Fine Line Space Resolution Lithography For Integrated Circuit Features Using Double Patterning Technology App 20170194198 - Lee; Chia-Ying ;   et al. | 2017-07-06 |
Semiconductor Device Having Air Gap Structures And Method Of Fabricating Thereof App 20170154847 - TING; Chih-Yuan ;   et al. | 2017-06-01 |
Method and apparatus for back end of line semiconductor device processing Grant 9,627,250 - Wu , et al. April 18, 2 | 2017-04-18 |
Integrated Circuit With Conductive Line Having Line-Ends App 20170098574 - Ting; Chih-Yuan ;   et al. | 2017-04-06 |
Fine line space resolution lithography structure for integrated circuit features using double patterning technology Grant 9,613,903 - Lee , et al. April 4, 2 | 2017-04-04 |
Method of forming pattern for semiconductor device Grant 9,601,344 - Lee , et al. March 21, 2 | 2017-03-21 |
Interconnect structure and method of forming same Grant 9,601,348 - Chu , et al. March 21, 2 | 2017-03-21 |
Method of Preventing Pattern Collapse App 20170069573 - Ting; Chih-Yuan ;   et al. | 2017-03-09 |
Spacer Etching Process for Integrated Circuit Design App 20170069505 - LIU; RU-GUN ;   et al. | 2017-03-09 |
Semiconductor Device Having Air Gap Structures And Method Of Fabricating Thereof App 20170062348 - TING; Chih-Yuan ;   et al. | 2017-03-02 |
Semiconductor device having air gap structures and method of fabricating thereof Grant 9,570,341 - Ting , et al. February 14, 2 | 2017-02-14 |
Method for forming line end space structure using trimmed photo resist Grant 9,564,327 - Lee , et al. February 7, 2 | 2017-02-07 |
Contact Plug without Seam Hole and Methods of Forming the Same App 20170025309 - Ting; Chih-Yuan ;   et al. | 2017-01-26 |
Method of forming integrated circuit with conductive line having line-ends Grant 9,524,902 - Huang , et al. December 20, 2 | 2016-12-20 |
Spacer etching process for integrated circuit design Grant 9,502,261 - Liu , et al. November 22, 2 | 2016-11-22 |
Method of preventing pattern collapse Grant 9,502,287 - Ting , et al. November 22, 2 | 2016-11-22 |
Semiconductor device having air gap structures and method of fabricating thereof Grant 9,496,224 - Ting , et al. November 15, 2 | 2016-11-15 |
Interconnect Structure and Method of Forming the Same App 20160329237 - Chen; Jeng-Shiou ;   et al. | 2016-11-10 |
Contact plug without seam hole and methods of forming the same Grant 9,472,448 - Ting , et al. October 18, 2 | 2016-10-18 |
Interconnect structure and method of forming the same Grant 9,401,329 - Chen , et al. July 26, 2 | 2016-07-26 |
Interconnect structure and method of forming the same Grant 9,397,047 - Chen , et al. July 19, 2 | 2016-07-19 |
Air Gap Structure and Method App 20160093566 - Ting; Chih-Yuan ;   et al. | 2016-03-31 |
Method of Fine Line Space Resolution Lithography for Integrated Circuit Features Using Double Patterning Technology App 20160086887 - Lee; Chia-Ying ;   et al. | 2016-03-24 |
Double Patterning Method App 20160064248 - Lee; Chia-Ying ;   et al. | 2016-03-03 |
Structure And Formation Method Of Dual Damascene Structure App 20160064274 - PENG; Tai-Yen ;   et al. | 2016-03-03 |
Method Of Preventing Pattern Collapse App 20160027688 - Ting; Chih-Yuan ;   et al. | 2016-01-28 |
Double patterning method Grant 9,240,346 - Lee , et al. January 19, 2 | 2016-01-19 |
Spacer Etching Process for Integrated Circuit Design App 20160005614 - LIU; RU-GUN ;   et al. | 2016-01-07 |
Interconnect Structure and Method of Forming the Same App 20150371955 - Chen; Jeng-Shiou ;   et al. | 2015-12-24 |
Method of fine line space resolution lithography for integrated circuit features using double patterning technology Grant 9,204,538 - Lee , et al. December 1, 2 | 2015-12-01 |
Semiconductor Device Having Air Gap Structures And Method Of Fabricating Thereof App 20150333011 - Ting; Chih-Yuan ;   et al. | 2015-11-19 |
Semiconductor Device Having Air Gap Structures And Method Of Fabricating Thereof App 20150332954 - Ting; Chih-Yuan ;   et al. | 2015-11-19 |
Spacer etching process for integrated circuit design Grant 9,153,478 - Liu , et al. October 6, 2 | 2015-10-06 |
Method of preventing a pattern collapse Grant 9,153,479 - Ting , et al. October 6, 2 | 2015-10-06 |
Interconnect structure and method of forming the same Grant 9,142,450 - Chen , et al. September 22, 2 | 2015-09-22 |
Contact Plug without Seam Hole and Methods of Forming the Same App 20150262868 - Ting; Chih-Yuan ;   et al. | 2015-09-17 |
Semiconductor Device and Method App 20150262873 - Chu; Ming-Hui ;   et al. | 2015-09-17 |
Photo Resist Trimmed Line End Space App 20150255283 - Lee; Chia-Ying ;   et al. | 2015-09-10 |
Organosilicate polymer mandrel for self-aligned double patterning process Grant 9,123,656 - Hsieh , et al. September 1, 2 | 2015-09-01 |
Method Of Forming Pattern For Semiconductor Device App 20150187591 - Lee; Chia-Ying ;   et al. | 2015-07-02 |
Multi-patterning Method And Device Formed By The Method App 20150179450 - LEE; Chia-Ying ;   et al. | 2015-06-25 |
Method of Semiconductor Integrated Circuit Fabrication App 20150170959 - Huang; Pei-Wen ;   et al. | 2015-06-18 |
Photo resist trimmed line end space Grant 9,040,433 - Lee , et al. May 26, 2 | 2015-05-26 |
Multi-patterning method and device formed by the method Grant 8,987,142 - Lee , et al. March 24, 2 | 2015-03-24 |
Semiconductor device with self aligned end-to-end conductive line structure and method for forming the same Grant 8,962,432 - Lee , et al. February 24, 2 | 2015-02-24 |
Method of forming pattern for semiconductor device Grant 8,962,484 - Lee , et al. February 24, 2 | 2015-02-24 |
Integrated Circuit Features with Fine Line Space and Methods for Forming the Same App 20150047891 - Lee; Chia-Ying ;   et al. | 2015-02-19 |
Photo Resist Trimmed Line End Space App 20140377962 - Lee; Chia-Ying ;   et al. | 2014-12-25 |
Patterned line end space Grant 8,865,600 - Lee , et al. October 21, 2 | 2014-10-21 |
Dual damascene process Grant 8,841,214 - Lee , et al. September 23, 2 | 2014-09-23 |
Method and Apparatus for Back End of Line Semiconductor Device Processing App 20140264926 - Wu; Chung-Wen ;   et al. | 2014-09-18 |
Double Patterning Method App 20140273433 - Lee; Chia-Ying ;   et al. | 2014-09-18 |
Spacer Etching Process For Integrated Circuit Design App 20140273442 - Liu; Ru-Gun ;   et al. | 2014-09-18 |
Interconnect Structure And Method Of Forming The Same App 20140264903 - Chen; Jeng-Shiou ;   et al. | 2014-09-18 |
Interconnect Structure And Method Of Forming The Same App 20140252648 - Chen; Jeng-Shiou ;   et al. | 2014-09-11 |
Method of Preventing a Pattern Collapse App 20140252625 - Ting; Chih-Yuan ;   et al. | 2014-09-11 |
Photo resist trimmed line end space Grant 8,828,885 - Lee , et al. September 9, 2 | 2014-09-09 |
Multi-patterning Method And Device Formed By The Method App 20140193974 - LEE; Chia-Ying ;   et al. | 2014-07-10 |
Patterned Line End Space App 20140193980 - Lee; Chia-Ying ;   et al. | 2014-07-10 |
Photo Resist Trimmed Line End Space App 20140193981 - Lee; Chia-Ying ;   et al. | 2014-07-10 |
Semiconductor Device With Self Aligned End-to-end Conductive Line Structure And Method For Forming The Same App 20140148005 - LEE; Chia-Ying ;   et al. | 2014-05-29 |
Dual Damascene Process App 20140127897 - LEE; Chia-Ying ;   et al. | 2014-05-08 |
Method of patterning for a semiconductor device Grant 8,697,537 - Lee , et al. April 15, 2 | 2014-04-15 |
Semiconductor device with self aligned end-to-end conductive line structure and method of forming the same Grant 8,669,180 - Lee , et al. March 11, 2 | 2014-03-11 |
Dual damascene process Grant 8,633,108 - Lee , et al. January 21, 2 | 2014-01-21 |
Method Of Patterning For A Semiconductor Device App 20130196481 - Lee; Chia Ying ;   et al. | 2013-08-01 |
Method Of Forming Pattern For Semiconductor Device App 20130157462 - Lee; Chia Ying ;   et al. | 2013-06-20 |
Dual damascene interconnect in hybrid dielectric Grant 8,415,799 - Su , et al. April 9, 2 | 2013-04-09 |
Wet cleaning stripping of etch residue after trench and via opening formation in dual damascene process Grant 7,968,506 - Chou , et al. June 28, 2 | 2011-06-28 |
Contact hole structures and contact structures and fabrication methods thereof Grant 7,875,547 - Hsu , et al. January 25, 2 | 2011-01-25 |
Wet Cleaning Stripping Of Etch Residue After Trench And Via Opening Formation In Dual Damascene Process App 20100055897 - Chou; Chun-Li ;   et al. | 2010-03-04 |
Method for photoresist stripping and treatment of low-k dielectric material Grant 7,598,176 - Tsai , et al. October 6, 2 | 2009-10-06 |
Measuring low dielectric constant film properties during processing Grant 7,400,401 - Tsai , et al. July 15, 2 | 2008-07-15 |
Poly Silicon Hard Mask App 20080122107 - Tsai; Jang-Shiang ;   et al. | 2008-05-29 |
CMOS devices with improved gap-filling Grant 7,378,308 - Hsu , et al. May 27, 2 | 2008-05-27 |
Alternative interconnect structure for semiconductor devices Grant 7,341,935 - Hsu , et al. March 11, 2 | 2008-03-11 |
Cleaning porous low-k material in the formation of an interconnect structure App 20070254476 - Chou; Chun-Li ;   et al. | 2007-11-01 |
CMOS devices with improved gap-filling App 20070235823 - Hsu; Ju-Wang ;   et al. | 2007-10-11 |
Method Of Forming Silicided Gate Structure App 20070222000 - Chan; Bor-Wen ;   et al. | 2007-09-27 |
Multiple gate field effect transistor structure Grant 7,271,448 - Hsu , et al. September 18, 2 | 2007-09-18 |
Resistance-reduced semiconductor device and methods for fabricating the same Grant 7,256,498 - Huang , et al. August 14, 2 | 2007-08-14 |
Method of forming silicided gate structure Grant 7,241,674 - Chan , et al. July 10, 2 | 2007-07-10 |
Methods and structures for critical dimension and profile measurement Grant 7,208,331 - Shieh , et al. April 24, 2 | 2007-04-24 |
Method of making dual damascene with via etch through Grant 7,196,002 - Su , et al. March 27, 2 | 2007-03-27 |
Transistor with high dielectric constant gate and method for forming the same Grant 7,179,701 - Hsu , et al. February 20, 2 | 2007-02-20 |
Via in semiconductor device App 20070035026 - Su; Yi-Nien ;   et al. | 2007-02-15 |
Dual damascene interconnect in hybrid dielectric App 20070001306 - Su; Yi-Nien ;   et al. | 2007-01-04 |
Air gap interconnect structure and method thereof App 20060264027 - Su; Yi-Nien ;   et al. | 2006-11-23 |
Measuring low dielectric constant film properties during processing App 20060220653 - Tsai; Jang-Shiang ;   et al. | 2006-10-05 |
Air gap interconnect structure and method thereof Grant 7,094,689 - Su , et al. August 22, 2 | 2006-08-22 |
Multiple gate field effect transistor structure App 20060180854 - Hsu; Ju-Wang ;   et al. | 2006-08-17 |
Contact hole structures and contact structures and fabrication methods thereof App 20060154478 - Hsu; Ju-Wang ;   et al. | 2006-07-13 |
Process for improving dielectric properties in low-k organosilicate dielectric material Grant 7,074,727 - Hsu , et al. July 11, 2 | 2006-07-11 |
Forming a dual damascene structure without ashing-damaged ultra-low-k intermetal dielectric App 20060115981 - Shieh; Jyu-Horng ;   et al. | 2006-06-01 |
Low oxygen content photoresist stripping process for low dielectric constant materials Grant 7,029,992 - Shieh , et al. April 18, 2 | 2006-04-18 |
Methods and structures for critical dimension and profile measurement App 20060073620 - Shieh; Jyu-Horng ;   et al. | 2006-04-06 |
Method for photoresist stripping and treatment of low-k dielectric material App 20060063386 - Tsai; Jang-Shiang ;   et al. | 2006-03-23 |
Transistor with high dielectric constant gate and method for forming the same App 20060063322 - Hsu; Ju-Wang ;   et al. | 2006-03-23 |
Dual damascene structure formed of low-k dielectric materials Grant 7,015,133 - Su , et al. March 21, 2 | 2006-03-21 |
Low Oxygen Content Photoresist Stripping Process For Low Dielectric Constant Materials App 20060040474 - Shieh; Jyu-Horng ;   et al. | 2006-02-23 |
Method of making dual damascene with via etch through App 20060030159 - Su; Yi-Nien ;   et al. | 2006-02-09 |
Air gap interconnect structure and method thereof App 20060019482 - Su; Yi-Nien ;   et al. | 2006-01-26 |
Alternative interconnect structure for semiconductor devices App 20050285268 - Hsu, Ju-Wang ;   et al. | 2005-12-29 |
Resistance-reduced semiconductor device and methods for fabricating the same App 20050258499 - Huang, Yi-Chun ;   et al. | 2005-11-24 |
Method of forming silicided gate structure App 20050253204 - Chan, Bor-Wen ;   et al. | 2005-11-17 |
Dual Damascene Structure Formed Of Low-k Dielectric Materials App 20050233572 - Su, Yi-Nien ;   et al. | 2005-10-20 |
Resistance-reduced semiconductor device and fabrication thereof App 20050212058 - Huang, Yi-Chun ;   et al. | 2005-09-29 |
Process for improving dielectric properties in low-k organosilicate dielectric material App 20050010000 - Hsu, Peng-Fu ;   et al. | 2005-01-13 |
Method for preventing photoresist poisoning Grant 6,790,770 - Chen , et al. September 14, 2 | 2004-09-14 |
Method for preventing photoresist poisoning App 20030087518 - Chen, Chao-Cheng ;   et al. | 2003-05-08 |
Method for reducing light reflectance in a photolithographic process App 20030044726 - Chen, Jong ;   et al. | 2003-03-06 |
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