SHI; Jiaxiang
Patent Applications and Registrations
Patent applications and USPTO patent grants for SHI; Jiaxiang.The latest application filed is for "a system communication technique over pcie (peripheral component interconnect express) link".
- SHI; Jiaxiang - Singapore SG
| Patent | Date |
|---|---|
| A SYSTEM COMMUNICATION TECHNIQUE OVER PCIe (PERIPHERAL COMPONENT INTERCONNECT EXPRESS) LINK App 20220214992 - LEI; Chuanhua ; et al. | 2022-07-07 |
| Memory Management Device App 20220179792 - BANERJEE; Ritesh ; et al. | 2022-06-09 |
| Memory management device containing memory copy device with direct memory access (DMA) port Grant 11,354,244 - Banerjee , et al. June 7, 2 | 2022-06-07 |
| Hardware assisted fault injection detection Grant 10,878,099 - Wu , et al. December 29, 2 | 2020-12-29 |
| Systems and Methods for Dynamic Phase Alignment of Clocks App 20200212915 - Attineni; Ravindar ; et al. | 2020-07-02 |
| Non-volatile-memory (nvm) Contents Read Return Validation App 20200210587 - Shi; Jiaxiang ; et al. | 2020-07-02 |
| Systems and methods for dynamic phase alignment of clocks Grant 10,700,687 - Attineni , et al. | 2020-06-30 |
| Selective data lane interface mapping Grant 10,671,551 - Shi , et al. | 2020-06-02 |
| Hardware Assisted Fault Injection Detection App 20180189496 - Wu; Qiming ; et al. | 2018-07-05 |
| Memory Management Device App 20180173626 - Banerjee; Ritesh ; et al. | 2018-06-21 |
| ATM bonding Grant 7,710,979 - Volkening , et al. May 4, 2 | 2010-05-04 |
| Method and system for generating a DMA controller interrupt App 20080147905 - Shi; Jiaxiang ; et al. | 2008-06-19 |
| Apparatus and method for chained arbitration of a plurality of inputs App 20080059674 - Shi; Jiaxiang ; et al. | 2008-03-06 |
| Pin multiplexing Grant 7,199,607 - Volkening , et al. April 3, 2 | 2007-04-03 |
| Pin multiplexing App 20060132178 - Volkening; Ingo ; et al. | 2006-06-22 |
| ATM bonding App 20060104315 - Volkening; Ingo ; et al. | 2006-05-18 |
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