Sheu; Shing-Ren

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sheu; Shing-Ren.The latest application filed is for "semiconductor package structure and interposer therefor".

Company Profile

0.11.7

Sheu; Shing-Ren - Taoyuan County TW
Sheu; Shing-Ren - Taoyuan TW
Sheu; Shing-Ren - Taoyuan City TW
Sheu; Shing-Ren - Hsinchu City TW
Sheu; Shing-Ren - Tao-Yuan TW
Sheu, Shing-Ren - Tao-Yuan City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Package Structure And Interposer Therefor App 20140070404 - Sheu; Shing-Ren ; et al.	2014-03-13
Device under test array for identifying defects Grant 7,859,285 - Sheu , et al. December 28, 2	2010-12-28
Test System For Identifying Defects And Method Of Operating The Same App 20090322360 - Sheu; Shing-Ren ; et al.	2009-12-31
Method Of Fabricating Anti-fuse And Method Of Programming Anti-fuse App 20090029541 - Chang; Kuang-Yeh ; et al.	2009-01-29
Anti-fuse App 20090026576 - Chang; Kuang-Yeh ; et al.	2009-01-29
Anti-fuse Which Will Not Generate A Non-linear Current After Being Blown And Otp Memory Cell Utilizing The Anti-fuse App 20080211060 - Chang; Kuang-Yeh ; et al.	2008-09-04
Parasitic capacitance-preventing dummy solder bump structure and method of making the same Grant 7,026,234 - Jao , et al. April 11, 2	2006-04-11
Parasitic Capacitance-preventing Dummy Solder Bump Structure And Method Of Making The Same App 20040266160 - Jao, Jui-Meng ; et al.	2004-12-30
Bonding pad structure of semiconductor device having improved bondability Grant 6,455,943 - Sheu , et al. September 24, 2	2002-09-24
Variable work function transistor high density mask ROM Grant 6,417,548 - Sheu , et al. July 9, 2	2002-07-09
Short turn around time mask ROM process Grant 6,054,353 - Sheu , et al. April 25, 2	2000-04-25
Variable work function transistor high density mask ROM Grant 5,942,786 - Sheu , et al. August 24, 1	1999-08-24
Post-titanium nitride mask ROM programming method and device manufactured thereby Grant 5,654,576 - Hsue , et al. August 5, 1	1997-08-05
CVD oxide coding method for ultra-high density mask read-only-memory (ROM) Grant 5,597,753 - Sheu , et al. January 28, 1	1997-01-28
Stacked CVD oxide architecture multi-state memory cell for mask read-only memories Grant 5,576,573 - Su , et al. November 19, 1	1996-11-19
Metal oxide semiconductor device integral with an electro-static discharge circuit Grant 5,571,737 - Sheu , et al. November 5, 1	1996-11-05
Field effect transistor with recessed buried source and drain regions Grant 5,382,534 - Sheu , et al. January 17, 1	1995-01-17

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.