Sherlekar; Deepak

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sherlekar; Deepak.The latest application filed is for "automatic derivation of integrated circuit cell mapping rules in an engineering change order flow".

Company Profile

1.8.7

Sherlekar; Deepak - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Automatic derivation of integrated circuit cell mapping rules in an engineering change order flow Grant 11,416,661 - Wang , et al. August 16, 2	2022-08-16
Automatic Derivation Of Integrated Circuit Cell Mapping Rules In An Engineering Change Order Flow App 20210042459 - WANG; Kai-Ping ; et al.	2021-02-11
N-channel and p-channel finFET cell architecture Grant 8,595,661 - Kawa , et al. November 26, 2	2013-11-26
N-channel and P-channel finFET cell architecture with inter-block insulator Grant 8,561,003 - Kawa , et al. October 15, 2	2013-10-15
Structures And Methods For Optimizing Power Consumption In An Integrated Chip Design App 20130200945 - Siguenza; Oscar ; et al.	2013-08-08
Structures and methods for optimizing power consumption in an integrated chip design Grant 8,392,862 - Siguenza , et al. March 5, 2	2013-03-05
N-channel And P-channel Finfet Cell Architecture App 20130026572 - KAWA; JAMIL ; et al.	2013-01-31
N-channel And P-channel Finfet Cell Architecture With Inter-block Insulator App 20130026571 - KAWA; JAMIL ; et al.	2013-01-31
Apparatuses and methods for efficient power rail structures for cell libraries Grant 7,989,849 - Sherlekar , et al. August 2, 2	2011-08-02
Apparatuses And Methods For Efficient Power Rail Structures For Cell Libraries App 20080111158 - Sherlekar; Deepak ; et al.	2008-05-15

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