Sher; Joseph C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sher; Joseph C..The latest application filed is for "memory system including data obfuscation".

Company Profile

1.24.12

Sher; Joseph C. - Meridian ID
Sher; Joseph C. - Boise ID
Sher, Joseph C. - Meridan ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory system including data obfuscation Grant 11,093,588 - Morgan , et al. August 17, 2	2021-08-17
Memory System Including Data Obfuscation App 20180373850 - Morgan; Donald M. ; et al.	2018-12-27
Clamp circuit with fuse options Grant 7,468,623 - Sher , et al. December 23, 2	2008-12-23
System for testing integrated circuit devices App 20050270058 - Sher, Joseph C. ; et al.	2005-12-08
Circuit and method for measuring and forcing an internal voltage of an integrated circuit Grant 6,946,863 - Loughmiller , et al. September 20, 2	2005-09-20
System for testing integrated circuit devices Grant 6,930,503 - Sher , et al. August 16, 2	2005-08-16
Clamp circuit with fuse options Grant 6,885,238 - Sher , et al. April 26, 2	2005-04-26
System for testing integrated circuit devices App 20040201399 - Sher, Joseph C. ; et al.	2004-10-14
System for testing integrated circuit devices Grant 6,756,805 - Sher , et al. June 29, 2	2004-06-29
Clamp circuit with fuse options App 20040027190 - Sher, Joseph C. ; et al.	2004-02-12
Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice Grant 6,633,196 - Sher October 14, 2	2003-10-14
System for testing integrated circuit devices App 20030090285 - Sher, Joseph C. ; et al.	2003-05-15
Method for adjusting an output slew rate of a buffer Grant 6,504,396 - Sher , et al. January 7, 2	2003-01-07
Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice App 20020175741 - Sher, Joseph C.	2002-11-28
Voltage independent fuse circuit and method Grant 6,449,207 - Sher , et al. September 10, 2	2002-09-10
Structure for ESD proctection in semiconductor chips App 20020047165 - Casper, Stephen L. ; et al.	2002-04-25
Clamp circuit with fuse options App 20020030539 - Sher, Joseph C. ; et al.	2002-03-14
Buffer with adjustable slew rate and a method of providing an adjustable slew rate App 20020030511 - Sher, Joseph C. ; et al.	2002-03-14
Voltage independent fuse circuit and method App 20010046170 - Sher, Joseph C. ; et al.	2001-11-29
Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice App 20010026185 - Sher, Joseph C.	2001-10-04
Apparatus and method for generating a clock within a semiconductor device and devices and systems including same App 20010011913 - Sher, Joseph C.	2001-08-09
Memory repair Grant 6,154,851 - Sher , et al. November 28, 2	2000-11-28
Voltage compensating CMOS input buffer circuit Grant 6,069,492 - Sher , et al. May 30, 2	2000-05-30
Circuit and method for measuring and forcing an internal voltage of an integrated circuit Grant 5,977,763 - Loughmiller , et al. November 2, 1	1999-11-02
High voltage protection for an integrated circuit input buffer Grant 5,973,900 - Sher October 26, 1	1999-10-26
Method and apparatus for reprogramming a supervoltage circuit Grant 5,949,725 - Sher September 7, 1	1999-09-07
Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice Grant 5,905,401 - Sher May 18, 1	1999-05-18
Method and apparatus for programming anti-fuses Grant 5,844,298 - Smith , et al. December 1, 1	1998-12-01
Supervoltage circuit Grant 5,841,714 - Sher , et al. November 24, 1	1998-11-24
Antifuse programming method and apparatus Grant 5,815,429 - Sher , et al. September 29, 1	1998-09-29
Voltage generator for antifuse programming Grant 5,793,224 - Sher August 11, 1	1998-08-11
Structure for ESD protection in semiconductor chips Grant 5,767,552 - Casper , et al. June 16, 1	1998-06-16
Post-fabrication programmable integrated circuit ring oscillator Grant 5,689,213 - Sher November 18, 1	1997-11-18
Antifuse programming method and apparatus Grant 5,668,751 - Sher , et al. September 16, 1	1997-09-16
Well resistor for ESD protection of CMOS circuits Grant 5,654,860 - Casper , et al. August 5, 1	1997-08-05
Voltage compensating CMOS input buffer circuit Grant 5,578,941 - Sher , et al. November 26, 1	1996-11-26

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