| Patent | Date |
|---|
Method of forming semiconductor material in trenches having different widths, and related structures
Grant 10,714,376 - Chang , et al. | 2020-07-14 |
Method Of Forming Semiconductor Material In Trenches Having Different Widths, And Related Structures
App 20190393077 - Chang; Chih-Chiang ; et al. | 2019-12-26 |
Semiconductor Structure
App 20180350607 - SHU; Jiehui ; et al. | 2018-12-06 |
Integrated circuits including a dummy metal feature and methods of forming the same
Grant 10,062,641 - Sheng , et al. August 28, 2 | 2018-08-28 |
Siloxane and organic-based MOL contact patterning
Grant 10,056,458 - Maeng , et al. August 21, 2 | 2018-08-21 |
Contact etch stop layer with sacrificial polysilicon layer
Grant 9,991,363 - Huang , et al. June 5, 2 | 2018-06-05 |
Methods for nitride planarization using dielectric
Grant 9,966,272 - Sheng , et al. May 8, 2 | 2018-05-08 |
Notched Fin Structures And Methods Of Manufacture
App 20180108732 - Shu; Jiehui ; et al. | 2018-04-19 |
Integrated Circuits Including A Dummy Metal Feature And Methods Of Forming The Same
App 20180076128 - Sheng; Haifeng ; et al. | 2018-03-15 |
Silicon nitride CESL removal without gate cap height loss and resulting device
Grant 9,905,472 - Shu , et al. February 27, 2 | 2018-02-27 |
Devices And Methods Of Forming Sadp On Sram And Saqp On Logic
App 20180012760 - SHU; Jiehui ; et al. | 2018-01-11 |
Plasma discharge path
Grant 9,793,208 - Sheng , et al. October 17, 2 | 2017-10-17 |
Devices and methods of forming SADP on SRAM and SAQP on logic
Grant 9,761,452 - Shu , et al. September 12, 2 | 2017-09-12 |
Self-aligned lithographic patterning with variable spacings
Grant 9,711,447 - Shu , et al. July 18, 2 | 2017-07-18 |
Siloxane And Organic-based Mol Contact Patterning
App 20170200792 - MAENG; Chang Ho ; et al. | 2017-07-13 |
Methods of forming spacers on FinFET devices
Grant 9,673,301 - Al-Amoody , et al. June 6, 2 | 2017-06-06 |
Methods of forming self-aligned contacts on FinFET devices
Grant 9,627,274 - Sheng , et al. April 18, 2 | 2017-04-18 |
Plasma Discharge Path
App 20170092584 - SHENG; Haifeng ; et al. | 2017-03-30 |
Integrated circuit system employing alternating conductive layers
Grant 9,147,654 - Sheng , et al. September 29, 2 | 2015-09-29 |
Poly profile engineering to modulate spacer induced stress for device enhancement
Grant 8,519,445 - Ho , et al. August 27, 2 | 2013-08-27 |
Method of fabricating a conductive interconnect arrangement for a semiconductor device
Grant 8,183,149 - Permana , et al. May 22, 2 | 2012-05-22 |
Poly Profile Engineering To Modulate Spacer Induced Stress For Device Enhancement
App 20110266628 - HO; Vincent ; et al. | 2011-11-03 |
Poly profile engineering to modulate spacer induced stress for device enhancement
Grant 7,993,997 - Ho , et al. August 9, 2 | 2011-08-09 |
Integrated Circuit System Employing Alternating Conductive Layers
App 20100001370 - Sheng; Haifeng ; et al. | 2010-01-07 |
Implantation for shallow trench isolation (STI) formation and for stress for transistor performance enhancement
App 20090315115 - Zhang; Beichao ; et al. | 2009-12-24 |
Poly Profile Engineering To Modulate Spacer Induced Stress For Device Enhancement
App 20090085122 - Ho; Vincent ; et al. | 2009-04-02 |
Schottky diode with silver layer contacting the ZnO and Mg.sub.xZn.sub.1-xO films
Grant 7,400,030 - Lu , et al. July 15, 2 | 2008-07-15 |
Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films
App 20050145970 - Lu, Yicheng ; et al. | 2005-07-07 |
Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films
Grant 6,846,731 - Lu , et al. January 25, 2 | 2005-01-25 |
Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films
App 20030129813 - Lu, Yicheng ; et al. | 2003-07-10 |
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