| Patent | Date |
|---|
Symmetric multiprocessing system with unified environment and distributed system functions wherein bus operations related storage spaces are mapped into a single system address space
Grant 6,125,436 - Bertone , et al. September 26, 2 | 2000-09-26 |
Symmetric multiprocessing system with unified environment and distributed system functions
Grant 5,956,522 - Bertone , et al. September 21, 1 | 1999-09-21 |
Adaptively generating timing signals for access to various memory devices based on stored profiles
Grant 5,809,340 - Bertone , et al. September 15, 1 | 1998-09-15 |
Symmetric multiprocessing system with unified environment and distributed system functions
Grant 5,522,069 - Bertone , et al. May 28, 1 | 1996-05-28 |
Symmetric multiprocessing system with unified environment and distributed system functions
Grant 5,517,648 - Bertone , et al. May 14, 1 | 1996-05-14 |
Control store addressing from multiple sources
Grant 5,197,133 - Shen , et al. March 23, 1 | 1993-03-23 |
Recovery method and apparatus for a pipelined processing unit of a multiprocessor system
Grant 5,193,181 - Barlow , et al. March 9, 1 | 1993-03-09 |
State controlled instruction logic management apparatus included in a pipelined processing unit
Grant 5,150,468 - Staplin , et al. September 22, 1 | 1992-09-22 |
Method for reexecuting instruction by altering high bits of instruction address based upon result of a subtraction operation with stored low bits
Grant 5,148,530 - Joyce , et al. September 15, 1 | 1992-09-15 |
Resource conflict detection method and apparatus included in a pipelined processing unit
Grant 5,073,855 - Staplin , et al. December 17, 1 | 1991-12-17 |
Mechanism for automatically updating multiple unit register file memories in successive cycles for a pipelined processing system
Grant 4,980,819 - Cushing , et al. December 25, 1 | 1990-12-25 |
Multiprocessors on a single semiconductor chip
Grant 4,942,547 - Joyce , et al. July 17, 1 | 1990-07-17 |
Dual read/write register file memory
Grant 4,933,909 - Cushing , et al. June 12, 1 | 1990-06-12 |
Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page
Grant 4,785,398 - Joyce , et al. November 15, 1 | 1988-11-15 |
Least recently used replacement level generating apparatus
Grant 4,783,735 - Miu , et al. November 8, 1 | 1988-11-08 |
Data processing system having synchronous bus wait/retry cycle
Grant 4,495,571 - Staplin, Jr. , et al. January 22, 1 | 1985-01-22 |
Microprogrammed system having hardware interrupt apparatus
Grant 4,484,271 - Miu , et al. November 20, 1 | 1984-11-20 |
Data processing system having centralized bus priority resolution
Grant 4,459,665 - Miu , et al. July 10, 1 | 1984-07-10 |
Data processing system having data entry backspace character apparatus
Grant 4,383,295 - Miller , et al. May 10, 1 | 1983-05-10 |
Data processing system having centralized data alignment for I/O controllers
Grant 4,321,665 - Shen , et al. March 23, 1 | 1982-03-23 |
Data processing system having centralized memory refresh
Grant 4,317,169 - Panepinto, Jr. , et al. February 23, 1 | 1982-02-23 |
Data processing system having data multiplex control apparatus
Grant 4,300,193 - Bradley , et al. November 10, 1 | 1981-11-10 |
Data processing system having multiple common buses
Grant 4,300,194 - Bradley , et al. November 10, 1 | 1981-11-10 |
Data processing system having direct memory access bus cycle
Grant 4,293,908 - Bradley , et al. October 6, 1 | 1981-10-06 |
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