Patent | Date |
---|
Method of making bipolar transistor Grant 11,233,121 - Yang , et al. January 25, 2 | 2022-01-25 |
Ultra high voltage semiconductor device with electrostatic discharge capabilities Grant 10,840,371 - Yang , et al. November 17, 2 | 2020-11-17 |
Method Of Making Bipolar Transistor App 20200312957 - YANG; Fu-Hsiung ;   et al. | 2020-10-01 |
Method of making bipolar transistor Grant 10,686,036 - Yang , et al. | 2020-06-16 |
Ultra High Voltage Semiconductor Device With Electrostatic Discharge Capabilities App 20200066902 - YANG; Tsai-Feng ;   et al. | 2020-02-27 |
Ultra high voltage semiconductor device with electrostatic discharge capabilities Grant 10,461,183 - Yang , et al. Oc | 2019-10-29 |
Ultra High Voltage Semiconductor Device With Electrostatic Discharge Capabilities App 20180151724 - YANG; Tsai-Feng ;   et al. | 2018-05-31 |
Super junction with an angled trench, transistor having the super junction and method of making the same Grant 9,985,094 - You , et al. May 29, 2 | 2018-05-29 |
Ultra high voltage semiconductor device with electrostatic discharge capabilities Grant 9,882,046 - Yang , et al. January 30, 2 | 2018-01-30 |
Semiconductor device and method of manufacturing the same Grant 9,748,377 - Huang , et al. August 29, 2 | 2017-08-29 |
Method Of Making Bipolar Transistor App 20170236904 - YANG; Fu-Hsiung ;   et al. | 2017-08-17 |
Bipolar transistor structure having split collector region and method of making the same Grant 9,647,065 - Yang , et al. May 9, 2 | 2017-05-09 |
Semiconductor structure and manufacturing method thereof Grant 9,558,986 - Yang , et al. January 31, 2 | 2017-01-31 |
Ultra High Voltage Semiconductor Device With Electrostatic Discharge Capabilities App 20160225899 - Yang; Tsai-Feng ;   et al. | 2016-08-04 |
Ultra high voltage semiconductor device with electrostatic discharge capabilities Grant 9,312,348 - Yang , et al. April 12, 2 | 2016-04-12 |
Semiconductor Device And Method Of Manufacturing The Same App 20160043215 - HUANG; Tzu-Ming ;   et al. | 2016-02-11 |
Semiconductor device and method of manufacturing Grant 9,166,046 - Huang , et al. October 20, 2 | 2015-10-20 |
Semiconductor Device And Method Of Manufacturing App 20150236149 - HUANG; Tzu-Ming ;   et al. | 2015-08-20 |
Ultra High Voltage Semiconductor Device With Electrostatic Discharge Capabilities App 20150236107 - YANG; Tsai-Feng ;   et al. | 2015-08-20 |
Super Junction With An Angled Trench, Transistor Having The Super Junction And Method Of Making The Same App 20150187872 - YOU; Jheng-Sheng ;   et al. | 2015-07-02 |
Bipolar Transistor Structure Having Split Collector Region And Method Of Making The Same App 20150108542 - YANG; Fu-Hsiung ;   et al. | 2015-04-23 |
Semiconductor Structure And Manufacturing Method Thereof App 20150076660 - YANG; TAI-I ;   et al. | 2015-03-19 |
Halogen gettering method for forming field effect transistor (FET) device Grant 6,995,064 - Hao , et al. February 7, 2 | 2006-02-07 |
Halogen gettering method for forming field effect transistor (FET) device App 20050218463 - Hao, Ching-Chen ;   et al. | 2005-10-06 |
Method for fabricating poly patterns Grant 6,949,471 - Hao , et al. September 27, 2 | 2005-09-27 |
Method for fabricating poly patterns App 20050026406 - Hao, Ching-Chen ;   et al. | 2005-02-03 |
Cost effective polymide process to solve passivation extrusion or damage and SOG delminates Grant 6,803,327 - Cheu , et al. October 12, 2 | 2004-10-12 |
Buried photodiode structure for CMOS image sensor Grant 6,627,475 - Yang , et al. September 30, 2 | 2003-09-30 |
Polysilicon structures with different resistance values for gate electrodes, resistors, and capacitor plates Grant 6,627,971 - Shen , et al. September 30, 2 | 2003-09-30 |
Implant method for forming Si3N4 spacer Grant 6,624,466 - Chen , et al. September 23, 2 | 2003-09-23 |
Implant method for forming Si3N4 spacer App 20020110972 - Chen, Sen-Fu ;   et al. | 2002-08-15 |
Implant method for forming Si3N4 spacer Grant 6,380,030 - Chen , et al. April 30, 2 | 2002-04-30 |
Method of manufacturing CMOS image sensor leakage free with double layer spacer Grant 6,071,826 - Cho , et al. June 6, 2 | 2000-06-06 |
Wafer edge seal ring structure Grant 5,929,509 - Shen , et al. July 27, 1 | 1999-07-27 |
Process to avoid dielectric damage at the flat edge of the water Grant 5,783,097 - Lo , et al. July 21, 1 | 1998-07-21 |
Method for forming conductive lines and stacked vias Grant 5,747,383 - Chen , et al. May 5, 1 | 1998-05-05 |
Chessboard pattern layout for scribe lines Grant 5,668,401 - Chao , et al. September 16, 1 | 1997-09-16 |
Tungsten stud process for stacked via applications Grant 5,591,673 - Chao , et al. January 7, 1 | 1997-01-07 |