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Patent applications and USPTO patent grants for Shelton; John F..The latest application filed is for "method and apparatus for checking cache coherency in a computer architecture".
Patent | Date |
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Method and apparatus for checking cache coherency in a computer architecture Grant 6,049,851 - Bryg , et al. April 11, 2 | 2000-04-11 |
Clock generating means for generating bus clock and chip clock synchronously having frequency ratio of N-1/N responsive to synchronization signal for inhibiting data transfer Grant 5,600,824 - Williams , et al. February 4, 1 | 1997-02-04 |
Computing system with a cache memory and an additional look-aside cache memory Grant 5,155,828 - La Fetra , et al. October 13, 1 | 1992-10-13 |
Fast multiple-word accesses from a multi-way set-associative cache memory Grant 5,091,851 - Shelton , et al. February 25, 1 | 1992-02-25 |
Apparatus for generation of scan control signals for initialization and diagnosis of circuitry in a computer Grant 4,961,013 - Obermeyer, Jr. , et al. October 2, 1 | 1990-10-02 |
Means for fast instruction decoding for a computer Grant 4,635,188 - Williamson , et al. January 6, 1 | 1987-01-06 |
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