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name:-0.021536111831665
name:-0.011458158493042
name:-0.0011389255523682
Shelor; Charles F. Patent Filings

Shelor; Charles F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shelor; Charles F..The latest application filed is for "apparatus and method for accessing registers in a processor".

Company Profile
0.11.14
  • Shelor; Charles F. - Arlington TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Managing registers in a processor to emulate a portion of a stack
Grant 7,363,475 - Shelor April 22, 2
2008-04-22
Managing stack transfers in a register-based processor
Grant 7,350,059 - Shelor March 25, 2
2008-03-25
Low-power decode circuitry and method for a processor having multiple decoders
Grant 7,194,601 - Shelor March 20, 2
2007-03-20
Status register update logic optimization
Grant 7,130,988 - Shelor October 31, 2
2006-10-31
Apparatus and method for accessing registers in a processor
App 20060136699 - Shelor; Charles F.
2006-06-22
Apparatus and method for accessing registers in a processor
Grant 7,024,544 - Shelor April 4, 2
2006-04-04
Apparatus and method for managing a processor pipeline in response to exceptions
Grant 7,013,383 - Shelor March 14, 2
2006-03-14
Apparatus and method for managing stack transfers in a register-based processor
App 20050262303 - Shelor, Charles F.
2005-11-24
Apparatus and method for managing registers in a processor to emulate a portion of stack
App 20050235093 - Shelor, Charles F.
2005-10-20
Hierarchical clock gating circuit and method
Grant 6,844,767 - Shelor January 18, 2
2005-01-18
Apparatus and method for accessing registers in a processor
App 20040268089 - Shelor, Charles F.
2004-12-30
Apparatus and method for managing a processor pipeline in response to exceptions
App 20040268103 - Shelor, Charles F.
2004-12-30
Hierarchical Clock Gating Circuit And Method
App 20040257139 - Shelor, Charles F.
2004-12-23
Method and system for terminating unnecessary processing of a conditional instruction in a processor
App 20040255103 - Duncan, Richard L. ;   et al.
2004-12-16
Method and system for predicting the execution of conditional instructions in a processor
App 20040230781 - Shelor, Charles F. ;   et al.
2004-11-18
Logic and method for reading data from cache
App 20040221117 - Shelor, Charles F.
2004-11-04
System and method for prefetching data
Grant 6,813,249 - Lauffenburger , et al. November 2, 2
2004-11-02
Low-power decode circuitry for a processor
App 20040205322 - Shelor, Charles F.
2004-10-14
Low-power decode circuitry for a processor
App 20040199747 - Shelor, Charles F.
2004-10-07
Low-power cache and method for operating same
App 20040199723 - Shelor, Charles F.
2004-10-07
Status register update logic optimization
App 20040098564 - Shelor, Charles F.
2004-05-20
System and method for traffic shaping packet-based signals
Grant 6,661,774 - Lauffenburger , et al. December 9, 2
2003-12-09
Data transmission system and method of operation
Grant 6,621,824 - Lauffenburger , et al. September 16, 2
2003-09-16
System and method for providing encrypted data to a device
App 20030108205 - Joyner, Bryan ;   et al.
2003-06-12
Modular multiple processor architecture using distributed cross-point switch
Grant 4,807,184 - Shelor February 21, 1
1989-02-21

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