loadpatents
name:-0.006497859954834
name:-0.033236026763916
name:-0.00041699409484863
Shelly; William A. Patent Filings

Shelly; William A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shelly; William A..The latest application filed is for "equal access to prevent gateword dominance in a multiprocessor write-into-cache environment".

Company Profile
0.26.4
  • Shelly; William A. - Phoenix AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Equal access to prevent gateword dominance in a multiprocessor write-into-cache environment
Grant 6,970,977 - Buzby , et al. November 29, 2
2005-11-29
High integrity cache directory
Grant 6,898,738 - Ryan , et al. May 24, 2
2005-05-24
Equal access to prevent gateword dominance in a multiprocessor write-into-cache environment
App 20040193804 - Buzby, Wayne R. ;   et al.
2004-09-30
Computer processor read/alter/rewrite optimization cache invalidate signals
Grant 6,754,859 - Hayden , et al. June 22, 2
2004-06-22
Computer processor read/alter/rewrite optimization cache invalidate signals
App 20040111656 - Hayden, Bruce E. ;   et al.
2004-06-10
Data processing system processor dynamic selection of internal signal tracing
Grant 6,530,076 - Ryan , et al. March 4, 2
2003-03-04
High integrity cache directory
App 20030018936 - Ryan, Charles P. ;   et al.
2003-01-23
Computer processor read/alter/rewrite optimization cache invalidate signals
App 20020087925 - Hayden, Bruce E. ;   et al.
2002-07-04
Data processing system processor delay instruction
Grant 6,230,263 - Ryan , et al. May 8, 2
2001-05-08
Multiprocessor computer system incorporating method and apparatus for dynamically assigning ownership of changeable data
Grant 5,963,973 - Vanhove , et al. October 5, 1
1999-10-05
Private cache miss and access management in a multiprocessor system with shared memory
Grant 5,829,029 - Shelly , et al. October 27, 1
1998-10-27
Fault tolerant multiprocessor computer system
Grant 5,649,090 - Edwards , et al. July 15, 1
1997-07-15
Basic operations synchronization and local mode controller in a VLSI central processor
Grant 5,644,761 - Yoder , et al. July 1, 1
1997-07-01
Central processor with duplicate basic processing units employing multiplexed data signals to reduce inter-unit conductor count
Grant 5,515,529 - Shelly , et al. May 7, 1
1996-05-07
Safestore frame implementation in a central processor
Grant 5,276,862 - McCulley , et al. January 4, 1
1994-01-04
Error detection in the basic processing unit of a VLSI central processor
Grant 5,263,034 - Guenthner , et al. November 16, 1
1993-11-16
Dual validity bit arrays
Grant 4,602,368 - Circello , et al. July 22, 1
1986-07-22
Method and apparatus for prefetching instructions for a central execution pipeline unit
Grant 4,594,659 - Guenthner , et al. June 10, 1
1986-06-10
Central processor
Grant 4,521,851 - Trubisky , et al. June 4, 1
1985-06-04
Instruction buffer associated with a cache memory unit
Grant 4,521,850 - Wilhite , et al. June 4, 1
1985-06-04
Method and apparatus for initiating the execution of instructions using a central pipeline execution unit
Grant 4,471,432 - Wilhite , et al. September 11, 1
1984-09-11
Data processing system programmable pre-read capability
Grant 4,371,927 - Wilhite , et al. February 1, 1
1983-02-01
Cache arrangement utilizing a split cycle mode of operation
Grant 4,245,304 - Porter , et al. January 13, 1
1981-01-13
Cache unit with transit block buffer apparatus
Grant 4,217,640 - Porter , et al. August 12, 1
1980-08-12
Cache arrangement for performing simultaneous read/write operations
Grant 4,208,716 - Porter , et al. June 17, 1
1980-06-17
Programmable interface apparatus and method
Grant 4,006,466 - Patterson , et al. February 1, 1
1977-02-01
Steering code generating apparatus for use in an input/output processing system
Grant 4,000,487 - Patterson , et al. December 28, 1
1976-12-28
Memory steering in a data processing system
Grant 3,990,051 - Shelly November 2, 1
1976-11-02
Processor for input-output processing system
Grant 3,976,977 - Porter , et al. August 24, 1
1976-08-24
Bidirectional Transmission Data Line Connecting Information Processing Equipment
Grant 3,643,223 - Ruth , et al. February 15, 1
1972-02-15

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