| Patent | Date |
|---|
Method, system, and computer program product for rearrangement of objects within an electronic design
Grant 10,769,346 - Yu , et al. Sep | 2020-09-08 |
Generating width spacing patterns for multiple patterning processes using instances
Grant 10,733,351 - Matsunami , et al. | 2020-08-04 |
Method, system, and computer program product to implement snapping for an electronic design
Grant 10,515,180 - Sharma , et al. Dec | 2019-12-24 |
Generating a colored track pattern of non-uniform width from a sparse set of tracks
Grant 10,452,806 - Rossman , et al. Oc | 2019-10-22 |
Method, system, and computer program product for implementing routing aware placement for an electronic design
Grant 10,452,807 - Sharma , et al. Oc | 2019-10-22 |
Method, system, and computer program product for implementing placement using row templates for an electronic design
Grant 10,402,530 - Sharma , et al. Sep | 2019-09-03 |
Method and system for performing incremental post layout simulation with layout edits
Grant 10,346,573 - Sharma , et al. July 9, 2 | 2019-07-09 |
Method, system, and computer program product for implementing track patterns for electronic circuit designs
Grant 10,296,695 - Lee , et al. | 2019-05-21 |
System and method for instance snapping
Grant 10,255,402 - Rossman , et al. | 2019-04-09 |
Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with lateral fills in electronic designs
Grant 9,904,756 - Ruehl , et al. February 27, 2 | 2018-02-27 |
Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques
Grant 9,754,072 - Salowe , et al. September 5, 2 | 2017-09-05 |
Methods, systems, and computer program product for a bottom-up electronic design implementation flow and track pattern definition for multiple-patterning lithographic techniques
Grant 9,659,138 - Powell , et al. May 23, 2 | 2017-05-23 |
Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with parallel fills in electronic designs
Grant 9,652,579 - Arkhipov , et al. May 16, 2 | 2017-05-16 |
Method, system, and computer program product for checking or verifying shapes in track patterns for electronic circuit designs
Grant 9,563,737 - Arkhipov , et al. February 7, 2 | 2017-02-07 |
Method, system, and computer program product for interconnecting circuit components with track patterns for electronic circuit designs
Grant 9,396,301 - Lee , et al. July 19, 2 | 2016-07-19 |
Methods, systems, and articles of manufacture for implementing electronic designs using constraint driven techniques
Grant 9,384,317 - Salowe , et al. July 5, 2 | 2016-07-05 |
Method, system, and computer program product for implementing repetitive track patterns for electronic circuit designs
Grant 9,372,955 - Lee , et al. June 21, 2 | 2016-06-21 |
Patient mounted MRI and CT compatible robot for needle guidance in interventional procedures
Grant 9,326,825 - Cleary , et al. May 3, 2 | 2016-05-03 |
Method and system for automatic generation of solutions for circuit design rule violations
Grant 9,256,708 - Sharma February 9, 2 | 2016-02-09 |
Patient Mounted Mri And Ct Compatible Robot For Needle Guidance In Interventional Procedures
App 20140371584 - CLEARY; Kevin ; et al. | 2014-12-18 |
Method and apparatus for automatically fixing double patterning loop violations
Grant 8,473,874 - Sharma , et al. June 25, 2 | 2013-06-25 |
Method And System For Automatic Generation Of Solutions For Circuit Design Rule Violations
App 20120124536 - Sharma; Karun | 2012-05-17 |
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