Sharma; Harsh D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sharma; Harsh D..The latest application filed is for "on-chip signal state duration measurement and adjustment".

Company Profile

0.6.7

Sharma; Harsh D. - Austin TX
Sharma; Harsh D - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
On-chip measurement of signal state duration Grant 7,131,034 - Eleyan , et al. October 31, 2	2006-10-31
Intelligent delay insertion based on transition Grant 7,116,126 - Tomsio , et al. October 3, 2	2006-10-03
On-chip signal state duration measurement and adjustment Grant 7,036,098 - Eleyan , et al. April 25, 2	2006-04-25
Priority delay insertion circuit Grant 7,016,422 - Sharma , et al. March 21, 2	2006-03-21
On-chip PLL locked frequency determination method and system Grant 6,891,403 - Sharma , et al. May 10, 2	2005-05-10
On-chip signal state duration measurement and adjustment App 20040268280 - Eleyan, Nadeem N. ; et al.	2004-12-30
Method and a system to distribute clock signals in digital circuits Grant 6,737,902 - Tomsio , et al. May 18, 2	2004-05-18
On-chip measurement of signal state duration App 20040093535 - Eleyan, Nadeem N. ; et al.	2004-05-13
On-chip PLL locked frequency determination method and system App 20040075477 - Sharma, Harsh D. ; et al.	2004-04-22
Method and a system to distribute clock signals in digital circuits App 20030214340 - Tomsio, Nayon ; et al.	2003-11-20
Zero-skew transition detection circuit App 20030120982 - Levy, Howard L. ; et al.	2003-06-26
Intelligent delay insertion based on transition App 20030072332 - Tomsio, Nayon ; et al.	2003-04-17
Priority delay insertion circuit App 20030031194 - Sharma, Harsh D. ; et al.	2003-02-13

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