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name:-0.023839950561523
name:-0.59334301948547
name:-0.47699999809265
SHAPPIR; Joseph Patent Filings

SHAPPIR; Joseph

Patent Applications and Registrations

Patent applications and USPTO patent grants for SHAPPIR; Joseph.The latest application filed is for "semiconductor waveguide structure".

Company Profile
0.11.8
  • SHAPPIR; Joseph - Tel Aviv IL
  • Shappir; Joseph - Mevasseret Zion IL
  • Shappir; Joseph - Jerusalem IL
  • Shappir; Joseph - Saratoga CA
  • Shappir; Joseph - San Jose CA
  • Shappir; Joseph - Haifa IL
  • Shappir; Joseph - Nijmegen NL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Waveguide Structure
App 20170176780 - LEVY; Uriel ;   et al.
2017-06-22
Photovoltaic Device And Method Of Its Fabrication
App 20130000705 - Shappir; Joseph
2013-01-03
Solar Cell With Funnel-like Groove Structure
App 20110162699 - Shappir; Joseph ;   et al.
2011-07-07
Electronic device for communication with living cells
Grant 7,795,039 - Spira , et al. September 14, 2
2010-09-14
Electronic device for communication with living cells
App 20070099173 - Spira; Micha ;   et al.
2007-05-03
Voltage tunable integrated infrared imager
App 20070063219 - Sa'ar; Amir ;   et al.
2007-03-22
Transistor-based biosensors having gate electrodes coated with receptor molecules
App 20060102935 - Yitzchaik; Shlomo ;   et al.
2006-05-18
Display devices manufactured utilizing mems technology
App 20040080484 - Heines, Amichai ;   et al.
2004-04-29
Hybrid electrical device with biological components
Grant 6,703,660 - Yitzchaik , et al. March 9, 2
2004-03-09
Hybrid electrical device with biological components
App 20020050611 - Yitzchaik, Shlomo ;   et al.
2002-05-02
Buried interconnect structure for semiconductor devices
Grant 5,332,913 - Shappir July 26, 1
1994-07-26
Process for forming a novel buried interconnect structure for semiconductor devices
Grant 5,306,667 - Shappir April 26, 1
1994-04-26
Composite dielectric for a semiconductor device and method of fabrication
Grant 5,258,333 - Shappir , et al. November 2, 1
1993-11-02
Hybrid extended drain concept for reduced hot electron effect
Grant 4,691,433 - Pimbley , et al. September 8, 1
1987-09-08
Hybrid extended drain concept for reduced hot electron effect
Grant 4,613,882 - Pimbley , et al. September 23, 1
1986-09-23
Process for fabricating a high density electrically programmable memory array
Grant 4,267,632 - Shappir May 19, 1
1981-05-19
MOS double polysilicon read-only memory and cell
Grant 4,180,826 - Shappir December 25, 1
1979-12-25
Semiconductor device and method of manufacturing the device
Grant 3,999,213 - Brandt , et al. December 21, 1
1976-12-21
Semiconductor device and method of manufacturing the device
Grant 3,921,283 - Shappir November 25, 1
1975-11-25

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