Shapiro; Michael J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shapiro; Michael J..The latest application filed is for "system, method and computer program product for data transfer management".

Company Profile

3.44.40

Shapiro; Michael J. - Austin TX
Shapiro; Michael J - Austin TX US
Shapiro; Michael J. - Hopewell Junction NY
Shapiro; Michael J. - Rochester MN
Shapiro; Michael J. - Austini TX
Shapiro; Michael J. - Fairfax VA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System, method and computer program product for data transfer management Grant 11,163,850 - Bell, Jr. , et al. November 2, 2	2021-11-02
System, Method And Computer Program Product For Data Transfer Management App 20200233909 - Bell, JR.; Robert H. ; et al.	2020-07-23
System, method and computer program product for data transfer management Grant 10,635,736 - Bell , et al.	2020-04-28
Dust guard structure Grant 10,398,044 - Shapiro , et al. A	2019-08-27
Dust Guard Structure App 20190037718 - Shapiro; Michael J. ; et al.	2019-01-31
Dust guard structure Grant 10,136,532 - Shapiro , et al. November 20, 2	2018-11-20
Dust Guard Structure App 20180242467 - Shapiro; Michael J. ; et al.	2018-08-23
Multicore processor and method of use that configures core functions based on executing instructions Grant 10,025,590 - Capps, Jr. , et al. July 17, 2	2018-07-17
Dust guard structure Grant 10,004,154 - Shapiro , et al. June 19, 2	2018-06-19
System, Method And Computer Program Product For Data Transfer Management App 20180165377 - Bell, JR.; Robert H. ; et al.	2018-06-14
System, method and computer program product for data transfer management Grant 9,881,099 - Bell, Jr. , et al. January 30, 2	2018-01-30
Corrosion resistant chip sidewall connection with crackstop and hermetic seal Grant 9,852,959 - Fitzsimmons , et al. December 26, 2	2017-12-26
Electrical connection around a crackstop structure Grant 9,812,404 - Shapiro , et al. November 7, 2	2017-11-07
Corrosion Resistant Chip Sidewall Connection With Crackstop And Hermetic Seal App 20170229362 - Fitzsimmons; John A. ; et al.	2017-08-10
Electrical Connection Around A Crackstop Structure App 20170194265 - Shapiro; Michael J. ; et al.	2017-07-06
Multicore Processor and Method of Use That Configures Core Functions Based on Executing Instructions App 20170075690 - Capps, JR.; Louis B. ; et al.	2017-03-16
Multicore processor and method of use that configures core functions based on executing instructions Grant 9,507,640 - Capps, Jr. , et al. November 29, 2	2016-11-29
Nested Helical Inductor App 20150371764 - Gordin; Rachel ; et al.	2015-12-24
Nested-helical Transformer App 20150371763 - Gordin; Rachel ; et al.	2015-12-24
Stacked through-silicon via (TSV) transformer structure Grant 9,111,933 - Carpenter , et al. August 18, 2	2015-08-18
Coil inductor for on-chip or on-chip stack Grant 9,105,627 - Shapiro , et al. August 11, 2	2015-08-11
Structure for logic circuit and serializer-deserializer stack Grant 9,058,458 - Shapiro , et al. June 16, 2	2015-06-16
Structure for logic circuit and serializer-deserializer stack Grant 9,059,163 - Shapiro , et al. June 16, 2	2015-06-16
Design Structure For Logic Circuit And Serializer-deserializer Stack App 20150113495 - Shapiro; Michael J. ; et al.	2015-04-23
Design Structure For Logic Circuit And Serializer-deserializer Stack App 20150109739 - Shapiro; Michael J. ; et al.	2015-04-23
Integrated decoupling capacitor employing conductive through-substrate vias Grant 8,785,289 - Kim , et al. July 22, 2	2014-07-22
Noise suppressor for semiconductor packages Grant 8,631,706 - Gruendler , et al. January 21, 2	2014-01-21
Integrated Decoupling Capacitor Employing Conductive Through-substrate Vias App 20130344675 - Kim; Tae Hong ; et al.	2013-12-26
Solder ball contact susceptible to lower stress Grant 8,614,512 - Guerin , et al. December 24, 2	2013-12-24
Stacked Through-Silicon Via (TSV) Transformer Structure App 20130307656 - Carpenter; Gary D. ; et al.	2013-11-21
Integrated decoupling capacitor employing conductive through-substrate vias Grant 8,558,345 - Kim , et al. October 15, 2	2013-10-15
Configuring plural cores to perform an instruction having a multi-core characteristic Grant 8,495,342 - Capps, Jr. , et al. July 23, 2	2013-07-23
Semiconductor structure having offset passivation to reduce electromigration Grant 8,487,447 - Interrante , et al. July 16, 2	2013-07-16
Coil Inductor For On-chip Or On-chip Stack App 20130113448 - SHAPIRO; MICHAEL J. ; et al.	2013-05-09
Solder ball contact susceptible to lower stress Grant 8,383,505 - Guerin , et al. February 26, 2	2013-02-26
Solder Ball Contact Susceptible To Lower Stress App 20130015579 - Guerin; Luc ; et al.	2013-01-17
Semiconductor Structure Having Offset Passivation To Reduce Electromigration App 20120292779 - INTERRANTE; MARIO J. ; et al.	2012-11-22
Alignment of wafers for 3D integration Grant 8,299,584 - Shneyder , et al. October 30, 2	2012-10-30
Solder Ball Contact Susceptible To Lower Stress App 20120256313 - Guerin; Luc ; et al.	2012-10-11
Semiconductor article having a through silicon via and guard ring Grant 8,232,648 - McGahay , et al. July 31, 2	2012-07-31
Noise Suppressor For Semiconductor Packages App 20120020042 - Gruendler; Nickolaus J. ; et al.	2012-01-26
Data And Control Encryption App 20120002812 - Bell, JR.; Robert H. ; et al.	2012-01-05
Semiconductor Article Having A Through Silicon Via And Guard Ring App 20110291279 - McGahay; Vincent J. ; et al.	2011-12-01
Methods And Materials For Using Nkap Polypeptide Expression Levels Or Patterns To Detect Or Assess Cancer App 20110269171 - Shapiro; Virginia M. ; et al.	2011-11-03
Alignment Of Wafers For 3d Integration App 20110215442 - Shneyder; Dmitriy ; et al.	2011-09-08
Method and structure for optimizing yield of 3-D chip manufacture Grant 7,999,377 - DeMulder , et al. August 16, 2	2011-08-16
Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics Grant 7,962,770 - Capps, Jr. , et al. June 14, 2	2011-06-14
Integrated Decoupling Capacitor Employing Conductive Through-substrate Vias App 20110108948 - Kim; Tae Hong ; et al.	2011-05-12
Uniform power density across processor cores at burn-in Grant 7,930,129 - Capps, Jr. , et al. April 19, 2	2011-04-19
Power-aware line intervention for a multiprocessor snoop coherency protocol Grant 7,870,337 - Bell, Jr. , et al. January 11, 2	2011-01-11
Multicore Processor And Method Of Use That Configures Core Functions Based On Executing Instructions App 20100153956 - Capps, JR.; Louis B. ; et al.	2010-06-17
Multicore Processor And Method Of Use That Configures Core Functions Based On Executing Instructions App 20100153700 - Capps, JR.; Louis B. ; et al.	2010-06-17
Method and structure for optimizing yield of 3-D chip manufacture Grant 7,737,003 - DeMulder , et al. June 15, 2	2010-06-15
Power grid structure to optimize performance of a multiple core processor Grant 7,667,470 - Audet , et al. February 23, 2	2010-02-23
Design Structure For An Apparatus For Monitoring And Controlling Heat Generation In A Multi-Core Processor App 20090177445 - Capps, JR.; Louis Bennie ; et al.	2009-07-09
Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics App 20090164812 - Capps, JR.; Louis B. ; et al.	2009-06-25
Power-aware line intervention for a multiprocessor directory-based coherency protocol App 20090138220 - Bell, JR.; Robert H. ; et al.	2009-05-28
Power-aware line intervention for a multiprocessor snoop coherency protocol App 20090138660 - Bell, JR.; Robert H. ; et al.	2009-05-28
Power Grid Structure to Optimize Performance of a Multiple Core Processor App 20080252308 - Audet; Jean ; et al.	2008-10-16
Power grid structure to optimize performance of a multiple core processor Grant 7,420,378 - Audet , et al. September 2, 2	2008-09-02
Silicon Multiple Core or Redundant Unit Optimization Tool App 20080178127 - Dewkett; Thomas J ; et al.	2008-07-24
Method and Structure for Optimizing Yield of 3-D Chip Manufacture App 20080142959 - DeMulder; Edward M. ; et al.	2008-06-19
Multiple-Core Processor App 20080126748 - Capps; Louis B. ; et al.	2008-05-29
Method and System for Using Multiple-Core Integrated Circuits App 20080127192 - Capps; Louis B. ; et al.	2008-05-29
Power Grid Structure To Optimize Performance Of A Multiple Core Processor App 20080012583 - AUDET; JEAN ; et al.	2008-01-17
Apparatus and method for customized burn-in of cores on a multicore microprocessor integrated circuit chip Grant 7,268,570 - Audet , et al. September 11, 2	2007-09-11
Method And Structure For Optimizing Yield Of 3-d Chip Manufacture App 20070080448 - DeMulder; Edward M. ; et al.	2007-04-12
Semiconductor Device With Internal Heat Dissipation App 20020024132 - MOTSIFF, WILLIAM T. ; et al.	2002-02-28
Interlevel dielectric stack containing plasma deposited fluorinated amorphous carbon films for semiconductor devices Grant 6,184,572 - Mountsier , et al. February 6, 2	2001-02-06
Plasma deposited fluorinated amorphous carbon films Grant 6,150,258 - Mountsier , et al. November 21, 2	2000-11-21
Method for the chemical vapor deposition of group IB and group VIIIB metal barrier layers Grant 5,352,656 - Lackey , et al. October 4, 1	1994-10-04