| Patent | Date |
|---|
Self-aligned Double Patterning With Spacer-merge Region
App 20220181154 - Topaloglu; Rasit Onur ; et al. | 2022-06-09 |
Self-aligned double patterning with spacer-merge region
Grant 11,302,532 - Topaloglu , et al. April 12, 2 | 2022-04-12 |
Color-map Method To Eliminate Qubit Frequency Crowding In A Quantum Computing Chip
App 20220058509 - Hertzberg; Jared Barney ; et al. | 2022-02-24 |
Multipole Filter On A Quantum Device With Multiplexing And Signal Separation
App 20220058508 - Srinivasan; Srikanth ; et al. | 2022-02-24 |
Uniform Chip Gaps Via Injection-molded Solder Pillars
App 20220020715 - Lewandowski; Eric Peter ; et al. | 2022-01-20 |
Bump Connection Placement In Quantum Devices In A Flip Chip Configuration
App 20210397774 - SHAO; Dongbing ; et al. | 2021-12-23 |
Bump connection placement in quantum devices in a flip chip configuration
Grant 11,205,035 - Shao , et al. December 21, 2 | 2021-12-21 |
Hybrid readout package for quantum multichip bonding
Grant 11,195,799 - Shao , et al. December 7, 2 | 2021-12-07 |
Qubit frequency tuning structures and fabrication methods for flip chip quantum computing devices
Grant 11,195,982 - Shao , et al. December 7, 2 | 2021-12-07 |
Tight pitch via structures enabled by orthogonal and non-orthogonal merged vias
Grant 11,189,566 - Shao , et al. November 30, 2 | 2021-11-30 |
Two-color Self-aligned Double Patterning (sadp) To Yield Static Random Access Memory (sram) And Dense Logic
App 20210343536 - Lie; Fee Li ; et al. | 2021-11-04 |
Air gap metal tip electrostatic discharge protection
Grant 11,165,248 - Chen , et al. November 2, 2 | 2021-11-02 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 11,163,932 - Shao , et al. November 2, 2 | 2021-11-02 |
Hybrid Readout Package For Quantum Multichip Bonding
App 20210305165 - Shao; Dongbing ; et al. | 2021-09-30 |
Coupled-Line Bus to Suppress Classical Crosstalk for Superconducting Qubits
App 20210305315 - Solgun; Firat ; et al. | 2021-09-30 |
Air gap metal tip electrostatic discharge protection
Grant 11,133,670 - Chen , et al. September 28, 2 | 2021-09-28 |
Self-aligned Double Patterning With Spacer-merge Region
App 20210272806 - Topaloglu; Rasit Onur ; et al. | 2021-09-02 |
Addressing Layout Retargeting Shortfalls
App 20210240899 - Shao; Dongbing ; et al. | 2021-08-05 |
Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic
Grant 11,062,911 - Lie , et al. July 13, 2 | 2021-07-13 |
Highway Jumper To Enable Long Range Connectivity For Superconducting Quantum Computer Chip
App 20210183793 - Shao; Dongbing ; et al. | 2021-06-17 |
Wirebond cross-talk reduction for quantum computing chips
Grant 11,038,093 - Shao , et al. June 15, 2 | 2021-06-15 |
Semiconductor fabrication design rule loophole checking for design for manufacturability optimization
Grant 11,036,126 - Lin , et al. June 15, 2 | 2021-06-15 |
Wirebond Cross-talk Reduction For Quantum Computing Chips
App 20210151656 - Shao; Dongbing ; et al. | 2021-05-20 |
Circuit Wiring Techniques For Stacked Transistor Structures
App 20210111121 - Shao; Dongbing ; et al. | 2021-04-15 |
Qubit Frequency Tuning Structures And Fabrication Methods For Flip Chip Quantum Computing Devices
App 20210091295 - SHAO; DONGBING ; et al. | 2021-03-25 |
Circuit wiring techniques for stacked transistor structures
Grant 10,950,545 - Shao , et al. March 16, 2 | 2021-03-16 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,936,782 - Shao , et al. March 2, 2 | 2021-03-02 |
Via design optimization to improve via resistance
Grant 10,915,690 - Shao , et al. February 9, 2 | 2021-02-09 |
Qubit frequency tuning structures and fabrication methods for flip chip quantum computing devices
Grant 10,903,412 - Shao , et al. January 26, 2 | 2021-01-26 |
Predicting Local Layout Effects In Circuit Design Patterns
App 20200380088 - Sha; Jing ; et al. | 2020-12-03 |
Predicting local layout effects in circuit design patterns
Grant 10,831,976 - Sha , et al. November 10, 2 | 2020-11-10 |
Wirebond cross-talk reduction for quantum computing chips
Grant 10,833,238 - Shao , et al. November 10, 2 | 2020-11-10 |
Horizontal-trench capacitor
Grant 10,833,146 - Xu , et al. November 10, 2 | 2020-11-10 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,831,973 - Shao , et al. November 10, 2 | 2020-11-10 |
Qubit Frequency Tuning Structures And Fabrication Methods For Flip Chip Quantum Computing Devices
App 20200335686 - SHAO; DONGBING ; et al. | 2020-10-22 |
Qubit Frequency Tuning Structures And Fabrication Methods For Flip Chip Quantum Computing Devices
App 20200335685 - Shao; Dongbing ; et al. | 2020-10-22 |
Via Design Optimization To Improve Via Resistance
App 20200327208 - Shao; Dongbing ; et al. | 2020-10-15 |
Bump connection placement in quantum devices in a flip chip configuration
Grant 10,796,069 - Shao , et al. October 6, 2 | 2020-10-06 |
Horizontal-Trench Capacitor
App 20200312951 - Xu; Zheng ; et al. | 2020-10-01 |
Perpendicular stacked field-effect transistor device
Grant 10,790,271 - Xu , et al. September 29, 2 | 2020-09-29 |
Circuit Wiring Techniques For Stacked Transistor Structures
App 20200286831 - Shao; Dongbing ; et al. | 2020-09-10 |
Two-color Self-aligned Double Patterning (sadp) To Yield Static Random Access Memory (sram) And Dense Logic
App 20200266072 - Lie; Fee Li ; et al. | 2020-08-20 |
Detecting hotspots in physical design layout patterns utilizing hotspot detection model with data augmentation
Grant 10,706,205 - Shao , et al. | 2020-07-07 |
Space exploration with Bayesian inference
Grant 10,678,971 - Sha , et al. | 2020-06-09 |
Application- or algorithm-specific quantum circuit design
Grant 10,657,212 - Shao , et al. | 2020-05-19 |
Detecting Hotspots In Physical Design Layout Patterns Utilizing Hotspot Detection Model With Data Augmentation
App 20200125695 - Shao; Dongbing ; et al. | 2020-04-23 |
Optimizing integrated circuit designs based on interactions between multiple integration design rules
Grant 10,628,544 - Chidambarrao , et al. | 2020-04-21 |
Classification and localization of hotspots in integrated physical design layouts
Grant 10,621,302 - Sha , et al. | 2020-04-14 |
Incorporation of process variation contours in design rule and risk estimation aspects of design for manufacturability to increase fabrication yield
Grant 10,621,295 - Liu , et al. | 2020-04-14 |
Superconducting quantum circuits layout design verification
Grant 10,599,805 - Shao , et al. | 2020-03-24 |
Application- Or Algorithm-specific Quantum Circuit Design
App 20200089832 - Shao; Dongbing ; et al. | 2020-03-19 |
Automatic design flow from schematic to layout for superconducting multi-qubit systems
Grant 10,592,814 - Shao , et al. | 2020-03-17 |
Optimizing integrated circuit designs based on interactions between multiple integration design rules
Grant 10,592,627 - Chidambarrao , et al. | 2020-03-17 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082049 - Shao; Dongbing ; et al. | 2020-03-12 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082048 - Shao; Dongbing ; et al. | 2020-03-12 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082047 - Shao; Dongbing ; et al. | 2020-03-12 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,586,012 - Shao , et al. | 2020-03-10 |
Semiconductor fabrication design rule loophole checking for design for manufacturability optimization
Grant 10,585,346 - Lin , et al. | 2020-03-10 |
Wirebond Cross-talk Reduction For Quantum Computing Chips
App 20200066961 - SHAO; DONGBING ; et al. | 2020-02-27 |
Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic
Grant 10,573,528 - Lie , et al. Feb | 2020-02-25 |
Air Gap Metal Tip Electrostatic Discharge Protection
App 20200059090 - Chen; Qianwen ; et al. | 2020-02-20 |
Air Gap Metal Tip Electrostatic Discharge Protection
App 20200059091 - Chen; Qianwen ; et al. | 2020-02-20 |
Design Space Exploration With Bayesian Inference
App 20200026807 - SHA; Jing ; et al. | 2020-01-23 |
Generation of hotspot-containing physical design layout patterns
Grant 10,539,881 - Sha , et al. Ja | 2020-01-21 |
Structure design generation for fixing metal tip-to-tip across cell boundary
Grant 10,534,258 - Han , et al. Ja | 2020-01-14 |
Air gap metal tip electrostatic discharge protection
Grant 10,535,994 - Chen , et al. Ja | 2020-01-14 |
Structure design generation for fixing metal tip-to-tip across cell boundary
Grant 10,527,932 - Han , et al. J | 2020-01-07 |
Air gap metal tip electrostatic discharge protection
Grant 10,530,150 - Chen , et al. J | 2020-01-07 |
Classification And Localization Of Hotspots In Integrated Physical Design Layouts
App 20200004918 - Sha; Jing ; et al. | 2020-01-02 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20190332738 - Shao; Dongbing ; et al. | 2019-10-31 |
Perpendicular Stacked Field-effect Transistor Device
App 20190319021 - Xu; Zheng ; et al. | 2019-10-17 |
Tight Pitch Via Structures Enabled By Orthogonal And Non-orthogonal Merged Vias
App 20190318989 - Shao; Dongbing ; et al. | 2019-10-17 |
Incorporation Of Process Variation Contours In Design Rule And Risk Estimation Aspects Of Design For Manufacturability To Increa
App 20190311071 - Liu; Jinning ; et al. | 2019-10-10 |
Semiconductor Fabrication Design Rule Loophole Checking For Design For Manufacturability Optimization
App 20190294039 - LIN; CHIEH-YU ; et al. | 2019-09-26 |
Semiconductor fabrication design rule loophole checking for design for manufacturability optimization
Grant 10,394,116 - Lin , et al. A | 2019-08-27 |
Two-color Self-aligned Double Patterning (sadp) To Yield Static Random Access Memory (sram) And Dense Logic
App 20190189457 - Lie; Fee Li ; et al. | 2019-06-20 |
Automatic Design Flow From Schematic To Layout For Superconducting Multi-qubit Systems
App 20190171973 - Shao; Dongbing ; et al. | 2019-06-06 |
Superconducting Quantum Circuits Layout Design Verification
App 20190171784 - Shao; Dongbing ; et al. | 2019-06-06 |
Structure Design Generation For Fixing Metal Tip-to-tip Across Cell Boundary
App 20190155148 - Han; Geng ; et al. | 2019-05-23 |
Structure Design Generation For Fixing Metal Tip-to-tip Across Cell Boundary
App 20190137867 - Han; Geng ; et al. | 2019-05-09 |
Structure design generation for fixing metal tip-to-tip across cell boundary
Grant 10,248,017 - Han , et al. | 2019-04-02 |
Optimizing Integrated Circuit Designs Based On Interactions Between Multiple Integration Design Rules
App 20190095551 - Chidambarrao; Dureseti ; et al. | 2019-03-28 |
Optimizing Integrated Circuit Designs Based On Interactions Between Multiple Integration Design Rules
App 20190095550 - Chidambarrao; Dureseti ; et al. | 2019-03-28 |
Semiconductor Fabrication Design Rule Loophole Checking For Design For Manufacturability Optimization
App 20190072845 - LIN; CHIEH-YU ; et al. | 2019-03-07 |
Semiconductor Fabrication Design Rule Loophole Checking For Design For Manufacturability Optimization
App 20190072846 - LIN; CHIEH-YU ; et al. | 2019-03-07 |
Integrated circuit design layout optimizer based on process variation and failure mechanism
Grant 10,083,272 - Clevenger , et al. September 25, 2 | 2018-09-25 |
Air Gap Metal Tip Electrostatic Discharge Protection
App 20180212423 - Chen; Qianwen ; et al. | 2018-07-26 |
Air Gap Metal Tip Electrostatic Discharge Protection
App 20180212424 - Chen; Qianwen ; et al. | 2018-07-26 |
Nanosheet capacitor
Grant 10,032,858 - Bi , et al. July 24, 2 | 2018-07-24 |
Nanosheet capacitor
Grant 9,991,334 - Bi , et al. June 5, 2 | 2018-06-05 |
Nanosheet Capacitor
App 20180083093 - Bi; Zhenxing ; et al. | 2018-03-22 |
Nanosheet Capacitor
App 20180083092 - Bi; Zhenxing ; et al. | 2018-03-22 |
Structure Design Generation For Fixing Metal Tip-to-tip Across Cell Boundary
App 20180067391 - Han; Geng ; et al. | 2018-03-08 |
Rule and process assumption co-optimization using feature-specific layout-based statistical analyses
Grant 9,898,573 - Culp , et al. February 20, 2 | 2018-02-20 |
Integrated Circuit Design Layout Optimizer Based On Process Variation And Failure Mechanism
App 20180046746 - Clevenger; Lawrence A. ; et al. | 2018-02-15 |
Structure design generation for fixing metal tip-to-tip across cell boundary
Grant 9,885,951 - Han , et al. February 6, 2 | 2018-02-06 |
Rule And Process Assumption Co-optimization Using Feature-specific Layout-based Statistical Analyses
App 20170228491 - Culp; James A. ; et al. | 2017-08-10 |
Nanosheet capacitor
Grant 9,685,499 - Bi , et al. June 20, 2 | 2017-06-20 |
Structure Design Generation For Fixing Metal Tip-to-tip Across Cell Boundary
App 20170168386 - Han; Geng ; et al. | 2017-06-15 |
Optical proximity correction (OPC) accounting for critical dimension (CD) variation from inter-level effects
Grant 9,536,039 - Banerjee , et al. January 3, 2 | 2017-01-03 |
Integrated circuit line ends formed using additive processing
Grant 9,418,935 - Shao , et al. August 16, 2 | 2016-08-16 |
Optical Proximity Correction (opc) Accounting For Critical Dimension (cd) Variation From Inter-level Effects
App 20160217249 - Banerjee; Shayak ; et al. | 2016-07-28 |
Air gap electrostatic discharge structure for high speed circuits
Grant 9,380,688 - Feng , et al. June 28, 2 | 2016-06-28 |
Optical proximity correction (OPC) accounting for critical dimension (CD) variation from inter-level effects
Grant 9,342,648 - Banerjee , et al. May 17, 2 | 2016-05-17 |
Reducing the impact of charged particle beams in critical dimension analysis
Grant 9,316,492 - Peterson , et al. April 19, 2 | 2016-04-19 |
Reducing The Impact Of Charged Particle Beams In Critical Dimension Analysis
App 20160040986 - Peterson; Kirk D. ; et al. | 2016-02-11 |
Optical Proximity Correction (opc) Accounting For Critical Dimension (cd) Variation From Inter-level Effects
App 20150356230 - Banerjee; Shayak ; et al. | 2015-12-10 |
Pattern recognition with edge correction for design based metrology
Grant 8,495,527 - Bailey , et al. July 23, 2 | 2013-07-23 |
Pattern recognition with edge correction for design based metrology
Grant 8,429,570 - Bailey , et al. April 23, 2 | 2013-04-23 |
Image Analysis of Processor Device Features
App 20130071006 - Shao; Dongbing | 2013-03-21 |
Correcting and Optimizing Contours for Optical Proximity Correction Modeling
App 20120192125 - Fischer; Daniel S. ; et al. | 2012-07-26 |
Pattern Recognition With Edge Correction For Design Based Metrology
App 20120110523 - Bailey; Todd C. ; et al. | 2012-05-03 |
Pattern Recognition with Edge Correction for Design Based Metrology
App 20120110522 - Bailey; Todd C. ; et al. | 2012-05-03 |
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