Shankar; Kapil

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shankar; Kapil.The latest application filed is for "compensation memory (cm) for power application".

Company Profile

9.32.17

Shankar; Kapil - Saratoga CA
Shankar; Kapil - Fremont CA
Shankar; Kapil - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power management integrated circuit integrating field effect transistors and programmable fabric Grant 10,447,276 - Shankar , et al. Oc	2019-10-15
Adaptive analog blocks with digital wrappers integrated onto programmable fabric Grant 10,425,082 - Shankar , et al. Sept	2019-09-24
Compensation memory (CM) for power application Grant 10,396,800 - Shankar , et al. A	2019-08-27
Pulse-width modulation (PWM) control loop for power application Grant 10,320,391 - Shankar , et al.	2019-06-11
Programmable analog and digital input/output for power application Grant 10,312,911 - Birkner , et al.	2019-06-04
Programmable logic device with integrated high voltage power FET Grant 10,291,229 - Shankar , et al.	2019-05-14
Pulse-width Modulation (pwm) Control Loop For Power Application App 20190052272 - Shankar; Kapil ; et al.	2019-02-14
Compensation Memory (cm) For Power Application App 20190052275 - Shankar; Kapil ; et al.	2019-02-14
Method and apparatus for analog to digital error conversion with multiple symmetric transfer functions Grant 10,200,056 - Samad , et al. Fe	2019-02-05
Precision modulation timer (PMT) integrated in a programmable logic device Grant 10,200,040 - Crotty , et al. Fe	2019-02-05
Noise-immune reference (NREF) integrated in a programmable logic device Grant 10,171,085 - Crotty , et al. J	2019-01-01
Pulse-width modulation (PWM) control loop for power application Grant 10,141,937 - Shankar , et al. Nov	2018-11-27
Compensation memory (CM) for power application Grant 10,135,447 - Shankar , et al. November 20, 2	2018-11-20
Programmable Analog And Digital Input/output For Power Application App 20180269876 - BIRKNER; John ; et al.	2018-09-20
Method And Apparatus For Analog To Digital Error Conversion With Multiple Symmetric Transfer Functions App 20180262202 - SAMAD; Maheen ; et al.	2018-09-13
Scalable integrated MOSFET (SIM) Grant 10,063,237 - Shankar , et al. August 28, 2	2018-08-28
Precision Modulation Timer (pmt) Integrated In A Programmable Logic Device App 20180234097 - CROTTY; Patrick J. ; et al.	2018-08-16
Noise-immune Reference (nref) Integrated In A Programmable Logic Device App 20180205381 - CROTTY; Patrick J. ; et al.	2018-07-19
Programmable analog and digital input/output for power application Grant 10,003,338 - Birkner , et al. June 19, 2	2018-06-19
Method and apparatus for analog to digital error conversion with multiple symmetric transfer functions Grant 9,998,135 - Samad , et al. June 12, 2	2018-06-12
Precision modulation timer (PMT) integrated in a programmable logic device Grant 9,979,395 - Crotty , et al. May 22, 2	2018-05-22
Programmable Logic Device With Integrated High Voltage Power Fet App 20180123596 - SHANKAR; Kapil ; et al.	2018-05-03
Noise-immune reference (NREF) integrated in a programmable logic device Grant 9,954,535 - Crotty , et al. April 24, 2	2018-04-24
Pulse-width Modulation (pwm) Control Loop For Power Application App 20180048318 - Shankar; Kapil ; et al.	2018-02-15
Method And Apparatus For Analog To Digital Error Conversion With Multiple Symmetric Transfer Functions App 20180048324 - Samad; Maheen ; et al.	2018-02-15
Programmable logic device with integrated high voltage power FET Grant 9,887,699 - Shankar , et al. February 6, 2	2018-02-06
Programmable Analog And Digital Input/output For Power Application App 20180026636 - BIRKNER; John ; et al.	2018-01-25
Scalable Integrated Mosfet (sim) App 20180026640 - SHANKAR; Kapil ; et al.	2018-01-25
Compensation Memory (cm) For Power Application App 20180026644 - SHANKAR; Kapil ; et al.	2018-01-25
Noise-immunie Reference (nref) Intergared In A Programmable Logic Device App 20180026643 - CROTTY; Patrick J. ; et al.	2018-01-25
Precision Modulation Timer (pmt) Integrated In A Programmalbe Logic Device App 20180026637 - CROTTY; Patrick J. ; et al.	2018-01-25
Programmable Logic Device With Integrated High Voltage Power Fet App 20170117900 - SHANKAR; Kapil ; et al.	2017-04-27
Power Management Integrated Circuit Integrating Field Effect Transistors And Programmable Fabric App 20170115717 - SHANKAR; Kapil ; et al.	2017-04-27
Adaptive Analog Blocks With Digital Wrappers Integrated Onto Programmable Fabric App 20170115718 - SHANKAR; Kapil ; et al.	2017-04-27
Application specific modules in a programmable logic device Grant 5,835,405 - Tsui , et al. November 10, 1	1998-11-10
Programmable integrated-circuit switch Grant 5,452,229 - Shankar , et al. September 19, 1	1995-09-19
Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device Grant 5,412,260 - Tsui , et al. May 2, 1	1995-05-02
Integrated circuit programmable sequencing element apparatus Grant 5,349,670 - Agrawal , et al. September 20, 1	1994-09-20
Output logic macrocell Grant 5,245,226 - Hood, Jr. , et al. September 14, 1	1993-09-14
Programmable interconnect structure for logic blocks Grant 5,204,556 - Shankar April 20, 1	1993-04-20
Output logic macrocell with enhanced functional capabilities Grant 5,191,243 - Shen , et al. March 2, 1	1993-03-02
Programmable logic device with observability and preloadability for buried state registers Grant 5,168,177 - Shankar , et al. * December 1, 1	1992-12-01
Programmable logic device providing product term sharing and steering to the outputs of the programmable logic device Grant 5,130,574 - Shen , et al. July 14, 1	1992-07-14
Programmable logic device with subroutine stack and random access memory Grant 5,042,004 - Agrawal , et al. August 20, 1	1991-08-20
Programmable logic device with observability and preload circuitry for buried state registers Grant 4,939,391 - Young , et al. July 3, 1	1990-07-03
Method for designing a control sequencer Grant 4,933,897 - Shankar , et al. June 12, 1	1990-06-12
Logic controller having programmable logic "and" array using a programmable gray-code counter Grant 4,876,640 - Shankar , et al. October 24, 1	1989-10-24
Programmable logic cell with flexible clocking and flexible feedback Grant 4,771,285 - Agrawal , et al. September 13, 1	1988-09-13
Programmable logic device with buried registers selectively multiplexed with output registers to ports, and preload circuitry therefor Grant 4,758,747 - Young , et al. July 19, 1	1988-07-19

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