Shankar; Harish

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shankar; Harish.The latest application filed is for "bitline-driven sense amplifier clocking scheme".

Company Profile

3.5.6

Shankar; Harish - Raleigh NC
Shankar; Harish - Cary NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multi-mode cache invalidation Grant 10,599,566 - Adaikkalavan , et al.	2020-03-24
Bitline-driven sense amplifier clocking scheme Grant 10,559,352 - Shankar , et al. Feb	2020-02-11
Bitline-driven Sense Amplifier Clocking Scheme App 20190214076 - SHANKAR; Harish ; et al.	2019-07-11
Multi-mode Cache Invalidation App 20180150394 - ADAIKKALAVAN; Ramasamy ; et al.	2018-05-31
Area Efficient Architecture For Multi Way Read On Highly Associative Content Addressable Memory (cam) Arrays App 20180088829 - SHANKAR; Harish ; et al.	2018-03-29
Collision detection systems for detecting read-write collisions in memory systems after word line activation, and related systems and methods Grant 9,666,269 - Shankar , et al. May 30, 2	2017-05-30
Collision Detection Systems For Detecting Read-write Collisions In Memory Systems After Word Line Activation, And Related Systems And Methods App 20160240244 - Shankar; Harish ; et al.	2016-08-18
Dummy read to prevent crowbar current during read-write collisions in memory arrays with crosscoupled keepers Grant 9,129,706 - Shankar , et al. September 8, 2	2015-09-08
Low voltage write speed bitcell Grant 9,093,125 - Puckett , et al. July 28, 2	2015-07-28
Dummy Read To Prevent Crowbar Current During Read-write Collisions In Memory Arrays With Crosscoupled Keepers App 20140119102 - Shankar; Harish ; et al.	2014-05-01
Low Voltage Write Speed Bitcell App 20130188434 - Puckett; Joshua L. ; et al.	2013-07-25

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