SHAH; PRIYAL

Patent Applications and Registrations

Patent applications and USPTO patent grants for SHAH; PRIYAL.The latest application filed is for "structural thermal interfacing for lidded semiconductor packages".

Company Profile

8.5.11

SHAH; PRIYAL - SANTA CLARA CA
Shah; Priyal - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structural Thermal Interfacing For Lidded Semiconductor Packages App 20220199429 - SHAH; PRIYAL ; et al.	2022-06-23
Molded chip package with anchor structures Grant 11,367,628 - Shah , et al. June 21, 2	2022-06-21
Molded Semiconductor Chip Package With Stair-step Molding Layer App 20210296194 - Shah; Priyal ; et al.	2021-09-23
Semiconductor Chip With Reduced Pitch Conductive Pillars App 20210193604 - SHAH; PRIYAL ; et al.	2021-06-24
Bond Pads For Low Temperature Hybrid Bonding App 20210183810 - SHAH; PRIYAL ; et al.	2021-06-17
Semiconductor chip with reduced pitch conductive pillars Grant 10,943,880 - Shah , et al. March 9, 2	2021-03-09
Bond pads for low temperature hybrid bonding Grant 10,937,755 - Shah , et al. March 2, 2	2021-03-02
Fan-out Package With Reinforcing Rivets App 20210057352 - Agarwal; Rahul ; et al.	2021-02-25
Molded Chip Package With Anchor Structures App 20210020459 - Shah; Priyal ; et al.	2021-01-21
Semiconductor Chip With Reduced Pitch Conductive Pillars App 20200365543 - Shah; Priyal ; et al.	2020-11-19
Fan-out package with multi-layer redistribution layer structure Grant 10,593,620 - Agarwal , et al.	2020-03-17
Bond Pads For Low Temperature Hybrid Bonding App 20200006280 - Shah; Priyal ; et al.	2020-01-02
Fan-out Package With Multi-layer Redistribution Layer Structure App 20190333851 - Agarwal; Rahul ; et al.	2019-10-31

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