Shah; Jay Madhukar
Patent Applications and Registrations
Patent applications and USPTO patent grants for Shah; Jay Madhukar.The latest application filed is for "stacked common gate finfet devices for area optimization".
- Shah; Jay Madhukar - Bangalore KRN IN
- Shah; Jay Madhukar - Bangalore IN
| Patent | Date |
|---|---|
| Flip-flop with reduced retention voltage Grant 9,673,786 - Rasouli , et al. June 6, 2 | 2017-06-06 |
| Stacked common gate finFET devices for area optimization Grant 9,397,101 - Chintarlapalli Reddy , et al. July 19, 2 | 2016-07-19 |
| Stacked Common Gate Finfet Devices For Area Optimization App 20150255461 - CHINTARLAPALLI REDDY; HariKrishna ; et al. | 2015-09-10 |
| Adaptive standard cell architecture and layout techniques for low area digital SoC Grant 9,070,552 - Shah , et al. June 30, 2 | 2015-06-30 |
| Circuit and layout techniques for flop tray area and power otimization Grant 9,024,658 - Shah , et al. May 5, 2 | 2015-05-05 |
| Circuit And Layout Techniques For Flop Tray Area And Power Otimization App 20140359385 - Shah; Jay Madhukar ; et al. | 2014-12-04 |
| Flip-flop With Reduced Retention Voltage App 20140306735 - Rasouli; Seid Hadi ; et al. | 2014-10-16 |
| Area Efficient Gridded Polysilicon Layouts App 20130032885 - Swamynathan; Chethan ; et al. | 2013-02-07 |
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