Settlemyer, Jr.; Kenneth T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Settlemyer, Jr.; Kenneth T..The latest application filed is for "methods and structures for protecting one area while processing another area on a chip".

Company Profile

0.26.3

Settlemyer, Jr.; Kenneth T. - Poughquag NY
Settlemyer, Jr.; Kenneth T. - Bradenton FL US
Settlemyer, Jr.; Kenneth T. - Bradeonton FL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and structures for protecting one area while processing another area on a chip Grant 9,472,402 - Kim , et al. October 18, 2	2016-10-18
Methods and structures for protecting one area while processing another area on a chip Grant 9,059,000 - Kim , et al. June 16, 2	2015-06-16
Methods and Structures for Protecting One Area While Processing Another Area on a Chip App 20150004802 - Kim; Deok-kee ; et al.	2015-01-01
Diagnosing in-line critical dimension control adjustments using optical proximity correction verification Grant 8,577,489 - Bruce , et al. November 5, 2	2013-11-05
Optical proximity correction verification accounting for mask deviations Grant 8,499,260 - Bruce , et al. July 30, 2	2013-07-30
Optical Proximity Correction Verification Accounting For Mask Deviations App 20120192124 - BRUCE; JAMES A. ; et al.	2012-07-26
Diagnosing In-line Critical Dimension Control Adjustments Using Optical Proximity Correction Verification App 20120191234 - Bruce; James A. ; et al.	2012-07-26
Device fabrication by anisotropic wet etch Grant 7,696,539 - Li , et al. April 13, 2	2010-04-13
Method of fabricating a bottle trench and a bottle trench capacitor Grant 7,670,901 - Kwon , et al. March 2, 2	2010-03-02
Corner clipping for field effect devices Grant 7,666,741 - Li , et al. February 23, 2	2010-02-23
Method for etching single-crystal semiconductor selective to amorphous/polycrystalline semiconductor and structure formed by same Grant 7,563,670 - Cheng , et al. July 21, 2	2009-07-21
Methods and structures for protecting one area while processing another area on a chip Grant 7,497,959 - Kim , et al. March 3, 2	2009-03-03
Method and apparatus for parallel data preparation and processing of integrated circuit graphical design data Grant 7,434,185 - Dooling , et al. October 7, 2	2008-10-07
Device fabrication by anisotropic wet etch Grant 7,410,844 - Li , et al. August 12, 2	2008-08-12
Pattern enhancement by crystallographic etching Grant 7,390,745 - Dyer , et al. June 24, 2	2008-06-24
Method of fabricating a bottle trench and a bottle trench capacitor Grant 7,387,930 - Kwon , et al. June 17, 2	2008-06-17
Replacement gate with TERA cap Grant 7,138,308 - Cheng , et al. November 21, 2	2006-11-21
Method of fabricating a bottle trench and a bottle trench capacitor Grant 7,122,439 - Kwon , et al. October 17, 2	2006-10-17
Self-aligned selective hemispherical grain deposition process and structure for enhanced capacitance trench capacitor Grant 7,101,768 - Settlemyer, Jr. , et al. September 5, 2	2006-09-05
Pull-back method of forming fins in FinFets Grant 7,018,551 - Beintner , et al. March 28, 2	2006-03-28
Semiconductor method and structure for simultaneously forming a trench capacitor dielectric and trench sidewall device dielectric Grant 6,936,512 - Chudzik , et al. August 30, 2	2005-08-30
Vertical semiconductor devices Grant 6,887,761 - Akatsu , et al. May 3, 2	2005-05-03
Vertical thermal nitride mask (anti-collar) and processing thereof Grant 6,797,582 - Gluschenkov , et al. September 28, 2	2004-09-28
Vertical hard mask Grant 6,723,611 - Akatsu , et al. April 20, 2	2004-04-20
Method and structure for salicide trench capacitor plate electrode Grant 6,664,161 - Chudzik , et al. December 16, 2	2003-12-16
Process flow for capacitance enhancement in a DRAM trench Grant 6,555,430 - Chudzik , et al. April 29, 2	2003-04-29

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