Seshan; Lakshmipriya

Patent Applications and Registrations

Patent applications and USPTO patent grants for Seshan; Lakshmipriya.The latest application filed is for "clock phase management for die-to-die (d2d) interconnect".

Company Profile

2.1.15

Seshan; Lakshmipriya - Sunnyvale CA
Seshan; Lakshmipriya - Santa Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Clock Phase Management For Die-to-die (d2d) Interconnect App 20220271912 - Pasdast; Gerald ; et al.	2022-08-25
Valid Signal For Latency Sensitive Die-to-die (d2d) Interconnects App 20220261308 - Lanka; Narasimha ; et al.	2022-08-18
Clock-gating In Die-to-die (d2d) Interconnects App 20220262756 - Lanka; Narasimha ; et al.	2022-08-18
Link Initialization Training And Bring Up For Die-to-die Interconnect App 20220237138 - Lanka; Narasimha ; et al.	2022-07-28
Sideband Interface For Die-to-die Interconnects App 20220222198 - Lanka; Narasimha ; et al.	2022-07-14
Scalable And Interoperable Phyless Die-to-die Io Solution App 20210398906 - QIAN; Zhiguo ; et al.	2021-12-23
Phy-based Retry Techniques For Die-to-die Interfaces App 20210344354 - Lanka; Narasimha ; et al.	2021-11-04
Approximate Data Bus Inversion Technique For Latency Sensitive Applications App 20210004347 - Lanka; Narasimha ; et al.	2021-01-07
Link Layer-phy Interface Adapter App 20200394150 - Lanka; Narasimha ; et al.	2020-12-17
Stacked Memory Device With End To End Data Bus Inversion App 20200251159 - Kind Code	2020-08-06
Clock phase compensation apparatus and method Grant 10,686,582 - Pasdast , et al.	2020-06-16

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