loadpatents
name:-0.0056838989257812
name:-0.015992164611816
name:-0.0016539096832275
seng shay ping Patent Filings

seng shay ping

Patent Applications and Registrations

Patent applications and USPTO patent grants for seng shay ping.The latest application filed is for "flexible instruction processor systems and methods".

Company Profile
2.16.2
  • - San Jose CA US
  • Seng; Shay Ping - San Jose CA
  • Seng; Shay Ping - Singapore SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of performing a simulation of a design under test and a circuit for enabling testing of a circuit design
Grant 08620638 -
2013-12-31
Method of performing a simulation of a design under test and a circuit for enabling testing of a circuit design
Grant 8,620,638 - Chan , et al. December 31, 2
2013-12-31
Method and apparatus for providing program-based hardware co-simulation of a circuit design
Grant 8,600,722 - Chan , et al. December 3, 2
2013-12-03
Co-simulation synchronization interface for IC modeling
Grant 8,265,917 - Ou , et al. September 11, 2
2012-09-11
Method and apparatus for modeling processor-based circuit models
Grant 8,229,725 - Ou , et al. July 24, 2
2012-07-24
Managing programmable device configuration
Grant 8,224,638 - Shirazi , et al. July 17, 2
2012-07-17
Interfacing with a dynamically configurable arithmetic unit
Grant 8,024,678 - Taylor , et al. September 20, 2
2011-09-20
Accelerating hardware co-simulation using dynamic replay on first-in-first-out-driven command processor
Grant 7,930,162 - Chan , et al. April 19, 2
2011-04-19
Using scripts for netlisting in a high-level modeling system
Grant 7,797,677 - Ballagh , et al. September 14, 2
2010-09-14
Processor event interface for programmable integrated circuit based circuit designs
Grant 7,617,471 - Seng , et al. November 10, 2
2009-11-10
Flexible Instruction Processor Systems And Methods
App 20090235241 - Luk; Wayne ;   et al.
2009-09-17
Generation of a circuit design from a command language specification of blocks in matrix form
Grant 7,571,395 - Seng , et al. August 4, 2
2009-08-04
Flexible instruction processor systems and methods
Grant 7,543,283 - Luk , et al. June 2, 2
2009-06-02
Method and apparatus for interfacing instruction processors and logic in an electronic circuit modeling system
Grant 7,539,953 - Seng , et al. May 26, 2
2009-05-26
Interfacing with a dynamically configurable arithmetic unit
Grant 7,523,434 - Taylor , et al. April 21, 2
2009-04-21
Wireless dynamic boundary-scan topologies for field
Grant 7,383,478 - Ballagh , et al. June 3, 2
2008-06-03
Instruction processor systems and methods
App 20040073899 - Luk, Wayne ;   et al.
2004-04-15

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed