Semmelmeyer; Mark

Patent Applications and Registrations

Patent applications and USPTO patent grants for Semmelmeyer; Mark.The latest application filed is for "method for training multichannel data receiver timing".

Company Profile

3.9.7

Semmelmeyer; Mark - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Training Multichannel Data Receiver Timing App 20210224221 - Jamadagni; Navaneeth P. ; et al.	2021-07-22
Method for training multichannel data receiver timing Grant 10,983,944 - Jamadagni , et al. April 20, 2	2021-04-20
Method For Training Multichannel Data Receiver Timing App 20200233832 - Jamadagni; Navaneeth P. ; et al.	2020-07-23
Narrow-parallel scan-based device testing Grant 10,656,205 - Semmelmeyer , et al.	2020-05-19
Narrow-parallel Scan-based Device Testing App 20190235023 - SEMMELMEYER; MARK ; et al.	2019-08-01
Multi-dimensional integrated circuit structures and methods of forming the same Grant 9,686,852 - Semmelmeyer , et al. June 20, 2	2017-06-20
Multi-Dimensional Integrated Circuit Structures and Methods of Forming the Same App 20150216030 - Semmelmeyer; Mark ; et al.	2015-07-30
Multi-dimensional integrated circuit structures and methods of forming the same Grant 9,054,101 - Semmelmeyer , et al. June 9, 2	2015-06-09
Multi-Dimensional Integrated Circuit Structures and Methods of Forming the Same App 20140147972 - Semmelmeyer; Mark ; et al.	2014-05-29
Multi-dimensional integrated circuit structures and methods of forming the same Grant 8,686,570 - Semmelmeyer , et al. April 1, 2	2014-04-01
Multi-Dimensional Integrated Circuit Structures and Methods of Forming the Same App 20130187292 - Semmelmeyer; Mark ; et al.	2013-07-25
System for placing entries of an outstanding processor request into a free pool after the request is accepted by a corresponding peripheral device Grant 5,737,547 - Zuravleff , et al. April 7, 1	1998-04-07
Processor system with dual clock Grant 5,325,516 - Blomgren , et al. June 28, 1	1994-06-28
Computer system architecture implementing split instruction and operand cache line-pair-state management Grant 5,095,424 - Woffinden , et al. March 10, 1	1992-03-10

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