Sejpal; Dhaval

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sejpal; Dhaval.The latest application filed is for "intertwined well connection and decoupling capacitor layout structure for integrated circuits".

Company Profile

3.7.8

Sejpal; Dhaval - San Diego CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Intertwined well connection and decoupling capacitor layout structure for integrated circuits Grant 11,244,895 - Manchana , et al. February 8, 2	2022-02-08
Intertwined Well Connection And Decoupling Capacitor Layout Structure For Integrated Circuits App 20210375747 - MANCHANA; Ramesh ; et al.	2021-12-02
Driver architecture for multiphase and amplitude encoding transmitters Grant 11,108,604 - Lee , et al. August 31, 2	2021-08-31
Driver Architecture For Multiphase And Amplitude Encoding Transmitters App 20210058280 - LEE; Chulkyu ; et al.	2021-02-25
Low power physical layer driver topologies Grant 10,833,899 - Chou , et al. November 10, 2	2020-11-10
Low Power Physical Layer Driver Topologies App 20190356519 - CHOU; Shih-Wei ; et al.	2019-11-21
Low power physical layer driver topologies Grant 10,419,252 - Chou , et al. Sept	2019-09-17
Reducing transmitter encoding jitter in a C-PHY interface using multiple clock phases to launch symbols Grant 10,289,600 - Sejpal , et al.	2019-05-14
Low Power Physical Layer Driver Topologies App 20180337698 - CHOU; Shih-Wei ; et al.	2018-11-22
Low Power Physical Layer Driver Topologies App 20180234122 - Chou; Shih-Wei ; et al.	2018-08-16
Low power physical layer driver topologies Grant 9,998,154 - Chou , et al. June 12, 2	2018-06-12
Reducing Transmitter Encoding Jitter In A C-phy Interface Using Multiple Clock Phases To Launch Symbols App 20170039163 - Sejpal; Dhaval ; et al.	2017-02-09
Time Based Equalization For A C-phy 3-phase Transmitter App 20170026083 - Sejpal; Dhaval ; et al.	2017-01-26
Time based equalization for a C-PHY 3-phase transmitter Grant 9,553,635 - Sejpal , et al. January 24, 2	2017-01-24
Low Power Physical Layer Driver Topologies App 20160373141 - Chou; Shih-Wei ; et al.	2016-12-22

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.