loadpatents
name:-0.020003080368042
name:-0.015937805175781
name:-0.0053489208221436
Segelken; Ross Patent Filings

Segelken; Ross

Patent Applications and Registrations

Patent applications and USPTO patent grants for Segelken; Ross.The latest application filed is for "memory type which is cacheable yet inaccessible by speculative instructions".

Company Profile
5.22.24
  • Segelken; Ross - Portland OR
  • Segelken; Ross - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory type which is cacheable yet inaccessible by speculative instructions
Grant 10,642,744 - Boggs , et al.
2020-05-05
Fault detection in instruction translations
Grant 10,324,725 - Tuck , et al.
2019-06-18
Instruction-optimizing processor with branch-count table in hardware
Grant 10,241,810 - Brauch , et al.
2019-03-26
Memory Type Which Is Cacheable Yet Inaccessible By Speculative Instructions
App 20190004961 - BOGGS; Darrell D. ;   et al.
2019-01-03
Translation address cache for a microprocessor
Grant 10,146,545 - Segelken , et al. De
2018-12-04
Profiling code portions to generate translations
Grant 10,108,424 - Tuck , et al. October 23, 2
2018-10-23
Fault Detection In Instruction Translations
App 20180260222 - Tuck; Nathan ;   et al.
2018-09-13
Lazy runahead operation for a microprocessor
Grant 9,891,972 - Ekman , et al. February 13, 2
2018-02-13
Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries
Grant 9,880,846 - Tuck , et al. January 30, 2
2018-01-30
Checkpointed buffer for re-entry from runahead
Grant 9,875,105 - Rozas , et al. January 23, 2
2018-01-23
Queued instruction re-dispatch after runahead
Grant 9,823,931 - Rozas , et al. November 21, 2
2017-11-21
Managing potentially invalid results during runahead
Grant 9,740,553 - Holmer , et al. August 22, 2
2017-08-22
Lazy Runahead Operation For A Microprocessor
App 20170199778 - Ekman; Magnus ;   et al.
2017-07-13
Lazy runahead operation for a microprocessor
Grant 9,632,976 - Rozas , et al. April 25, 2
2017-04-25
Dynamic configuration of processing pipeline based on determined type of fetched instruction
Grant 9,563,432 - Segelken , et al. February 7, 2
2017-02-07
Branch prediction power reduction
Grant 9,552,032 - Aggarwal , et al. January 24, 2
2017-01-24
Branch prediction power reduction
Grant 9,547,358 - Aggarwal , et al. January 17, 2
2017-01-17
Instruction cache power reduction
Grant 9,396,117 - Aggarwal , et al. July 19, 2
2016-07-19
Dynamic Configuration Of Processing Pipeline Based On Determined Type Of Fetched Instruction
App 20140317382 - Segelken; Ross ;   et al.
2014-10-23
Profiling Code Portions To Generate Translations
App 20140281392 - Tuck; Nathan ;   et al.
2014-09-18
Fault Detection In Instruction Translations
App 20140189310 - Tuck; Nathan ;   et al.
2014-07-03
Queued Instruction Re-dispatch After Runahead
App 20140189313 - Rozas; Guillermo J. ;   et al.
2014-07-03
Lazy Runahead Operation For A Microprocessor
App 20140164736 - Rozas; Guillermo J. ;   et al.
2014-06-12
Instruction Categorization For Runahead Operation
App 20140164738 - Ekman; Magnus ;   et al.
2014-06-12
Managing Potentially Invalid Results During Runahead
App 20140136891 - Holmer; Bruce ;   et al.
2014-05-15
Instruction-optimizing Processor With Branch-count Table In Hardware
App 20130311752 - Brauch; Rupert ;   et al.
2013-11-21
Checkpointed Buffer For Re-entry From Runahead
App 20130297911 - Rozas; Guillermo J. ;   et al.
2013-11-07
Branch Prediction Power Reduction
App 20130290640 - Aggarwal; Aneesh ;   et al.
2013-10-31
Branch Prediction Power Reduction
App 20130290676 - Aggarwal; Aneesh ;   et al.
2013-10-31
Accessing And Managing Code Translations In A Microprocessor
App 20130275684 - Tuck; Nathan ;   et al.
2013-10-17
Translation Address Cache For A Microprocessor
App 20130246709 - Segelken; Ross ;   et al.
2013-09-19
Instruction Cache Power Reduction
App 20130179640 - Aggarwal; Aneesh ;   et al.
2013-07-11

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed