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Patent applications and USPTO patent grants for Sebesta; Robert D..The latest application filed is for "electronic package with high density interconnect layer".
Patent | Date |
---|---|
Method of making an electronic package Grant 7,024,764 - Kresge , et al. April 11, 2 | 2006-04-11 |
Method of making a multi-layered interconnect structure Grant 6,829,823 - Downes, Jr. , et al. December 14, 2 | 2004-12-14 |
Fine pitch circuitization with filled plated through holes Grant 6,618,940 - Lubert , et al. September 16, 2 | 2003-09-16 |
High density design for organic chip carriers Grant 6,538,213 - Carden , et al. March 25, 2 | 2003-03-25 |
Electronic package with high density interconnect layer App 20020085364 - Downes, Francis J. JR. ;   et al. | 2002-07-04 |
Electronic package for electronic components and method of making same App 20020059723 - Kresge, John S. ;   et al. | 2002-05-23 |
Electronic package with high density interconnect layer Grant 6,373,717 - Downes, Jr. , et al. April 16, 2 | 2002-04-16 |
Fine pitch circuitization with filled plated through holes App 20010050183 - Lubert, Kenneth J. ;   et al. | 2001-12-13 |
Fine pitch circuitization with filled plated through holes Grant 6,291,779 - Lubert , et al. September 18, 2 | 2001-09-18 |
Electronic package with multilevel connections Grant 5,612,573 - Lewis , et al. March 18, 1 | 1997-03-18 |
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