Schwinn; Stephen Joseph

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schwinn; Stephen Joseph.The latest application filed is for "structural power reduction in multithreaded processor".

Company Profile

0.9.10

Schwinn; Stephen Joseph - Woodbury MN
Schwinn; Stephen Joseph - Lakeville MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dynamic merging of pipeline stages in an execution pipeline to reduce power consumption Grant 8,291,201 - Schwinn , et al. October 16, 2	2012-10-16
Structural power reduction in multithreaded processor Grant 8,140,830 - Schwinn , et al. March 20, 2	2012-03-20
Dynamic Merging of Pipeline Stages in an Execution Pipeline to Reduce Power Consumption App 20090292907 - Schwinn; Stephen Joseph ; et al.	2009-11-26
Structural Power Reduction in Multithreaded Processor App 20090293061 - Schwinn; Stephen Joseph ; et al.	2009-11-26
Processing Unit Incorporating Issue Rate-Based Predictive Thermal Management App 20090182986 - Schwinn; Stephen Joseph ; et al.	2009-07-16
Optimized specular highlight generation Grant 7,542,044 - Fossum , et al. June 2, 2	2009-06-02
Optimized specular highlight generation Grant 7,456,837 - Fossum , et al. November 25, 2	2008-11-25
Optimized Specular Highlight Generation App 20080158228 - Fossum; Gordon Clyde ; et al.	2008-07-03
Method and apparatus for implementing power of two floating point estimation Grant 7,143,126 - Fossum , et al. November 28, 2	2006-11-28
System and method for optimized specular highlight generation App 20060152508 - Fossum; Gordon Clyde ; et al.	2006-07-13
Apparatus for supporting a logically partitioned computer system Grant 6,993,640 - Doing , et al. January 31, 2	2006-01-31
Method for base two logarithmic estimation App 20050138095 - Fossum, Gordon Clyde ; et al.	2005-06-23
Apparatus for supporting a logically partitioned computer system App 20050091476 - Doing, Richard William ; et al.	2005-04-28
Method and apparatus for verifying hardware implementation of a processor architecture in a logically partitioned data processing system Grant 6,883,116 - Lee , et al. April 19, 2	2005-04-19
Method and apparatus for implementing power of two floating point estimation App 20040267853 - Fossum, Gordon Clyde ; et al.	2004-12-30
Applications of operating mode dependent error signal generation upon real address range checking prior to translation Grant 6,829,684 - Doing , et al. December 7, 2	2004-12-07
Method and apparatus for verifying hardware implementation of a processor architecture in a logically partitioned data processing system App 20030061540 - Lee, Van Hoa ; et al.	2003-03-27
Apparatus for supporting a logically partitioned computer system App 20030009648 - Doing, Richard William ; et al.	2003-01-09
Instruction cache for multithreaded processor Grant 6,161,166 - Doing , et al. December 12, 2	2000-12-12

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