Schwan; Christoph

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schwan; Christoph.The latest application filed is for "method of forming a semiconductor device comprising efuses of increased programming window".

Company Profile

2.26.26

Schwan; Christoph - Berlin-Charlottenburg DE
- Dresden DE
Schwan; Christoph - Dresden N/A DE
Schwan; Christoph - Gebhardshain DE
Schwan; Christoph - Gebhardsbain DE
Schwan; Christoph - Gebbhardshain DE
Schwan, Christoph - Gebharshain DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Wall construction and component for the same Grant 8,806,824 - Schwan August 19, 2	2014-08-19
SOI device with a buried insulating material having increased etch resistivity Grant 08617940 -	2013-12-31
SOI device with a buried insulating material having increased etch resistivity Grant 8,617,940 - Kurz , et al. December 31, 2	2013-12-31
Methods of forming efuse devices Grant 8,609,485 - Kurz , et al. December 17, 2	2013-12-17
Electronic fuse structure formed using a metal gate electrode material stack configuration Grant 8,564,089 - Kurz , et al. October 22, 2	2013-10-22
Method of Forming a Semiconductor Device Comprising eFuses of Increased Programming Window App 20120164799 - Kurz; Andreas ; et al.	2012-06-28
Semiconductor device comprising a silicon/germanium resistor Grant 8,193,066 - Kurz , et al. June 5, 2	2012-06-05
Semiconductor device comprising isolation trenches inducing different types of strain Grant 8,138,571 - Schwan , et al. March 20, 2	2012-03-20
Method of creating a strained channel region in a transistor by deep implantation of strain-inducing species below the channel region Grant 8,110,487 - Griebenow , et al. February 7, 2	2012-02-07
SEMICONDUCTOR DEVICE COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES AND eFUSES FORMED IN THE SEMICONDUCTOR MATERIAL App 20110241124 - Kurz; Andreas ; et al.	2011-10-06
Aluminum Fuses In A Semiconductor Device Comprising Metal Gate Electrode Structures App 20110241086 - Kurz; Andreas ; et al.	2011-10-06
Semiconductor Resistors Formed In A Semiconductor Device Comprising Metal Gates By Reducing Conductivity Of A Metal-containing Cap Material App 20110186916 - Kurz; Andreas ; et al.	2011-08-04
Technique for forming contact insulation layers and silicide regions with different characteristics Grant 7,838,359 - Schwan , et al. November 23, 2	2010-11-23
Method for patterning contact etch stop layers by using a planarization process Grant 7,838,354 - Frohberg , et al. November 23, 2	2010-11-23
Soi Device With A Buried Insulating Material Having Increased Etch Resistivity App 20100163994 - Kurz; Andreas ; et al.	2010-07-01
Semiconductor device including a vertical decoupling capacitor Grant 7,713,815 - Lehr , et al. May 11, 2	2010-05-11
Method of increasing transistor drive current by recessing an isolation trench Grant 7,659,170 - Schwan , et al. February 9, 2	2010-02-09
Semiconductor Device Comprising A Silicon/germanium Resistor App 20100025772 - Kurz; Andreas ; et al.	2010-02-04
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20090236667 - Schwan; Christoph ; et al.	2009-09-24
Method Of Creating A Strained Channel Region In A Transistor By Deep Implantation Of Strain-inducing Species Below The Channel Region App 20090194789 - Griebenow; Uwe ; et al.	2009-08-06
Field effect transistor having a stressed dielectric layer based on an enhanced device topography Grant 7,563,731 - Schwan , et al. July 21, 2	2009-07-21
Field effect transistor comprising a stressed channel region and method of forming the same Grant 7,556,996 - Schwan , et al. July 7, 2	2009-07-07
Method of making a semiconductor device comprising isolation trenches inducing different types of strain Grant 7,547,610 - Schwan , et al. June 16, 2	2009-06-16
Field Effect Transistor Having A Stressed Dielectric Layer Based On An Enhanced Device Topography App 20080081486 - Schwan; Christoph ; et al.	2008-04-03
Field Effect Transistor Comprising A Stressed Channel Region And Method Of Forming The Same App 20080079039 - Schwan; Christoph ; et al.	2008-04-03
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20080079085 - Schwan; Christoph ; et al.	2008-04-03
Method For Patterning Contact Etch Stop Layers By Using A Planarization Process App 20080057720 - Frohberg; Kai ; et al.	2008-03-06
Method of depositing a layer of a material on a substrate Grant 7,338,872 - Schwan , et al. March 4, 2	2008-03-04
Method Of Increasing Transistor Drive Current By Recessing An Isolation Trench App 20070278596 - Schwan; Christoph ; et al.	2007-12-06
Method of forming sidewall spacer elements for a circuit element by increasing an etch selectivity Grant 7,192,881 - Kammler , et al. March 20, 2	2007-03-20
Technique For Forming Contact Insulation Layers And Silicide Regions With Different Characteristics App 20070001233 - SCHWAN; CHRISTOPH ; et al.	2007-01-04
Semiconductor Device Including A Vertical Decoupling Capacitor App 20070001203 - LEHR; MATTHIAS ; et al.	2007-01-04
Method of compensating for etch rate non-uniformities by ion implantation Grant 7,098,140 - Schaller , et al. August 29, 2	2006-08-29
Method of forming a conformal spacer adjacent to a gate electrode structure Grant 7,064,071 - Schwan June 20, 2	2006-06-20
Signal layer for generating characteristic optical plasma emissions Grant 7,005,305 - Grasshoff , et al. February 28, 2	2006-02-28
Technique for forming recessed sidewall spacers for a polysilicon line Grant 7,005,358 - Kammler , et al. February 28, 2	2006-02-28
Method of adjusting etch selectivity by adapting aspect ratios in a multi-level etch process Grant 6,969,676 - Schwan , et al. November 29, 2	2005-11-29
Wall construction and component for the same App 20050257467 - Schwan, Christoph	2005-11-24
Method of forming sidewall spacers App 20050233532 - Lenski, Markus ; et al.	2005-10-20
Method of depositing a layer of a material on a substrate App 20050170660 - Schwan, Christoph ; et al.	2005-08-04
Method of forming sidewall spacer elements for a circuit element by increasing an etch selectivity App 20050118769 - Kammler, Thorsten ; et al.	2005-06-02
Method of forming a conformal spacer adjacent to a gate electrode structure App 20050048753 - Schwan, Christoph	2005-03-03
Technique for forming recessed sidewall spacers for a polysilicon line App 20050026380 - Kammler, Thorsten ; et al.	2005-02-03
Method of compensating for etch rate non-uniformities by ion implantation App 20040266200 - Schaller, Matthias ; et al.	2004-12-30
Method of adjusting etch selectivity by adapting aspect ratios in a multi-level etch process App 20040241984 - Schwan, Christoph ; et al.	2004-12-02
Method of forming a substrate contact for an SOI semiconductor device App 20040241917 - Schwan, Christoph ; et al.	2004-12-02
Plasma parameter control using learning data App 20040118516 - Grasshoff, Gunter ; et al.	2004-06-24
Signal layer for generating characteristic optical plasma emissions App 20040106284 - Grasshoff, Gunter ; et al.	2004-06-03
Method for formation of a differential offset spacer Grant 6,696,334 - Hellig , et al. February 24, 2	2004-02-24

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