SCHWALKE; Udo

Patent Applications and Registrations

Patent applications and USPTO patent grants for SCHWALKE; Udo.The latest application filed is for "method for operation of a field effect transistor arrangement".

Company Profile

0.19.2

SCHWALKE; Udo - Munster DE
Schwalke; Udo - Heldenstein DE
Schwalke; Udo - Williston VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Operation Of A Field Effect Transistor Arrangement App 20180076323 - SCHWALKE; Udo ; et al.	2018-03-15
Field Effect Transistor Arrangement App 20160218212 - SCHWALKE; Udo ; et al.	2016-07-28
Integrated circuit arrangement and method for the manufacture thereof Grant 6,913,983 - Schwalke , et al. July 5, 2	2005-07-05
Method for manufacturing an integrated circuit arrangement Grant 6,057,211 - Schwalke May 2, 2	2000-05-02
Method of producing an MOS transistor Grant 5,998,271 - Schwalke December 7, 1	1999-12-07
Circuit structure having at least one MOS transistor and method for its production Grant 5,965,926 - Schwalke October 12, 1	1999-10-12
MOSFETs with improved short channel effects Grant 5,932,919 - Schwalke August 3, 1	1999-08-03
Process for the production of an integrated CMOS circuit Grant 5,882,964 - Schwalke March 16, 1	1999-03-16
Formation of silicided junctions in deep submicron MOSFETS by defect enhanced CoSi2 formation Grant 5,780,929 - Zeininger , et al. July 14, 1	1998-07-14
Process for producing a diffusion region adjacent to a recess in a substrate Grant 5,726,094 - Schwalke , et al. March 10, 1	1998-03-10
Method for manufacturing an insulating trench in an SOI substrate for smartpower technologies Grant 5,700,712 - Schwalke December 23, 1	1997-12-23
Thin-film transistor and method for the manufacture thereof Grant 5,528,053 - Schwalke June 18, 1	1996-06-18
Method for manufacturing an insulating trench in a substrate for smart-power technologies Grant 5,496,765 - Schwalke March 5, 1	1996-03-05
Integrated circuit arrangement having at least one power component and low-voltage components Grant 5,473,181 - Schwalke , et al. December 5, 1	1995-12-05
Method for manufacturing an integrated circuit arrangement Grant 5,470,782 - Schwalke , et al. November 28, 1	1995-11-28
Method for manufacturing a trench in a substrate for use in smart-power technology Grant 5,445,988 - Schwalke August 29, 1	1995-08-29
Low junction leakage MOSFETs Grant 5,439,831 - Schwalke , et al. * August 8, 1	1995-08-08
Method for producing an insulating trench in an SOI substrate Grant 5,416,041 - Schwalke May 16, 1	1995-05-16
Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation Grant 5,344,793 - Zeininger , et al. September 6, 1	1994-09-06
Method of forming shallow junctions in field effect transistors Grant 5,268,317 - Schwalke , et al. December 7, 1	1993-12-07
Method for manufacturing a multi-layer gate electrode for a MOS transistor Grant 5,164,333 - Schwalke , et al. November 17, 1	1992-11-17

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