Schuster; Stanley E.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Schuster; Stanley E..The latest application filed is for "edram hierarchical differential sense amp".
Company Profile
0.34.18
- Schuster; Stanley E. - Granite Springs NY
- Schuster; Stanley E. - Granite Sprints NY
Patent Activity
| Patent | Date |
|---|---|
| Adaptive issue queue for reduced power at high performance Grant 7,865,747 - Buyuktosunoglu , et al. January 4, 2 | 2011-01-04 |
| eDRAM hierarchical differential sense AMP Grant 7,821,858 - Matick , et al. October 26, 2 | 2010-10-26 |
| Hierarchical 2T-DRAM with self-timed sensing Grant 7,709,299 - Matick , et al. May 4, 2 | 2010-05-04 |
| Interlocked synchronous pipeline clock gating Grant 7,685,457 - Jacobson , et al. March 23, 2 | 2010-03-23 |
| eDRAM Hierarchical Differential Sense AMP App 20090080230 - Matick; Richard E. ; et al. | 2009-03-26 |
| Fast, stable, SRAM cell using seven devices and hierarchical bit/sense line Grant 7,499,312 - Matick , et al. March 3, 2 | 2009-03-03 |
| Method of stalling one or more stages in an interlocked synchronous pipeline Grant 7,475,227 - Jacobson , et al. January 6, 2 | 2009-01-06 |
| Hierarchical six-transistor SRAM Grant 7,471,546 - Matick , et al. December 30, 2 | 2008-12-30 |
| Hierarchical 2t-dram With Self-timed Sensing App 20080308941 - Matick; Richard E. ; et al. | 2008-12-18 |
| Hierarchical 2T-DRAM with self-timed sensing Grant 7,460,423 - Matick , et al. December 2, 2 | 2008-12-02 |
| eDRAM hierarchical differential sense amp Grant 7,460,387 - Matick , et al. December 2, 2 | 2008-12-02 |
| Systems And Methods For A Dram Concurrent Refresh Engine With Processor Interface App 20080270683 - Barth; John E. ; et al. | 2008-10-30 |
| Hierarchical 2T-DRAM with Self-Timed Sensing App 20080165560 - Matick; Richard E. ; et al. | 2008-07-10 |
| eDRAM HIERARCHICAL DIFFERENTIAL SENSE AMP App 20080165601 - Matick; Richard E. ; et al. | 2008-07-10 |
| Fast, Stable, Sram Cell Using Seven Devices And Hierarchical Bit/sense Line App 20080165562 - Matick; Richard E. ; et al. | 2008-07-10 |
| Hierarchical Six-transistor Sram App 20080165561 - Matick; Richard E. ; et al. | 2008-07-10 |
| Dram Hierarchical Data Path App 20080016277 - Matick; Richard E. ; et al. | 2008-01-17 |
| Interlocked Synchronous Pipeline Clock Gating App 20070294548 - JACOBSON; Hans M. ; et al. | 2007-12-20 |
| Interlocked synchronous pipeline clock gating Grant 7,308,593 - Jacobson , et al. December 11, 2 | 2007-12-11 |
| DRAM hierarchical data path Grant 7,289,369 - Matick , et al. October 30, 2 | 2007-10-30 |
| Processor with low overhead predictive supply voltage gating for leakage power reduction Grant 7,134,028 - Bose , et al. November 7, 2 | 2006-11-07 |
| DRAM hierarchical data path App 20060233024 - Matick; Richard E. ; et al. | 2006-10-19 |
| Interlocked synchronous pipeline clock gating App 20060161795 - Jacobson; Hans M. ; et al. | 2006-07-20 |
| Interlocked synchronous pipeline clock gating App 20060156046 - Jacobson; Hans M. ; et al. | 2006-07-13 |
| Processor with demand-driven clock throttling power reduction Grant 7,076,681 - Bose , et al. July 11, 2 | 2006-07-11 |
| Interlocked synchronous pipeline clock gating Grant 7,065,665 - Jacobson , et al. June 20, 2 | 2006-06-20 |
| Synchronous to asynchronous to synchronous interface Grant 6,848,060 - Cook , et al. January 25, 2 | 2005-01-25 |
| Latch structure for interlocked pipelined CMOS (IPCMOS) circuits Grant 6,829,716 - Cook , et al. December 7, 2 | 2004-12-07 |
| Processor with low overhead predictive supply voltage gating for leakage power reduction App 20040221185 - Bose, Pradip ; et al. | 2004-11-04 |
| Interlocked synchronous pipeline clock gating App 20040068640 - Jacobson, Hans M. ; et al. | 2004-04-08 |
| Processor with demand-driven clock throttling power reduction App 20040044915 - Bose, Pradip ; et al. | 2004-03-04 |
| Synchronous to asynchronous to synchronous interface App 20020120883 - Cook, Peter W. ; et al. | 2002-08-29 |
| Adaptive issue queue for reduced power at high performance App 20020053038 - Buyuktosunoglu, Alper ; et al. | 2002-05-02 |
| Latch structure for interlocked pipelined CMOS (IPCMOS) circuits App 20010056552 - Cook, Peter W. ; et al. | 2001-12-27 |
| Virtual multi-port RAM employing multiple accesses during single machine cycle Grant 5,542,067 - Chappell , et al. July 30, 1 | 1996-07-30 |
| Electronic switch for decoupling capacitor Grant 5,506,457 - Krauter , et al. April 9, 1 | 1996-04-09 |
| Bit line switch array for electronic computer memory Grant 5,388,072 - Matick , et al. February 7, 1 | 1995-02-07 |
| Virtual multi-port RAM Grant 5,204,841 - Chappell , et al. April 20, 1 | 1993-04-20 |
| Pipelined memory chip structure having improved cycle time Grant 4,845,677 - Chappell , et al. July 4, 1 | 1989-07-04 |
| Complementary output, high-density CMOS decoder/driver circuit for semiconductor memories Grant 4,843,261 - Chappell , et al. June 27, 1 | 1989-06-27 |
| Method and structure for a high density VMOS dynamic ram array Grant 4,763,180 - Hwang , et al. August 9, 1 | 1988-08-09 |
| ECL to FET interface circuit for field effect transistor arrays Grant 4,645,954 - Schuster February 24, 1 | 1987-02-24 |
| Method and structure for machine data storage with simultaneous write and read Grant 4,599,708 - Schuster July 8, 1 | 1986-07-08 |
| High performance FET driver circuit Grant 4,491,748 - Chappell , et al. January 1, 1 | 1985-01-01 |
| Input buffer circuit for semiconductor memory Grant 4,441,039 - Schuster April 3, 1 | 1984-04-03 |
| Logic and array logic driving circuits Grant 4,295,064 - Schuster October 13, 1 | 1981-10-13 |
| A/D and D/A converter using C-2C ladder network Grant 4,028,694 - Cook , et al. June 7, 1 | 1977-06-07 |
| Fet Device With Guard Ring And Fabrication Method Therefor Grant 3,798,512 - Critchlow , et al. March 19, 1 | 1974-03-19 |
| Fast Error Recovery Communication Controller Grant 3,754,211 - Rocher , et al. August 21, 1 | 1973-08-21 |
| Communication System And Method Grant 3,732,374 - Rocher , et al. May 8, 1 | 1973-05-08 |
| Loop Switching Teleprocessing Method And System Using Switching Interface Grant 3,732,543 - Rocher , et al. May 8, 1 | 1973-05-08 |
| Multipath Encoder-decoder Arrangement Grant 3,657,699 - Rocher , et al. April 18, 1 | 1972-04-18 |
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