| Patent | Date |
|---|
Semiconductor devices having through-contacts and related fabrication methods
Grant 8,951,907 - Richter , et al. February 10, 2 | 2015-02-10 |
Method of reducing contamination by providing an etch stop layer at the substrate edge
Grant 8,426,312 - Richter , et al. April 23, 2 | 2013-04-23 |
Contact optimization for enhancing stress transfer in closely spaced transistors
Grant 8,384,161 - Richter , et al. February 26, 2 | 2013-02-26 |
Method and apparatus for reducing semiconductor package tensile stress
Grant 8,212,346 - Ryan , et al. July 3, 2 | 2012-07-03 |
Semiconductor Devices Having Through-contacts And Related Fabrication Methods
App 20120146106 - RICHTER; Ralf ; et al. | 2012-06-14 |
Void sealing in a dielectric material of a contact level of a semiconductor device comprising closely spaced transistors
Grant 8,129,276 - Richter , et al. March 6, 2 | 2012-03-06 |
Reducing metal voids in a metallization layer stack of a semiconductor device by providing a dielectric barrier layer
Grant 8,097,536 - Schuehrer , et al. January 17, 2 | 2012-01-17 |
Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition
Grant 8,039,400 - Koschinsky , et al. October 18, 2 | 2011-10-18 |
Contact Optimization For Enhancing Stress Transfer In Closely Spaced Transistors
App 20100327367 - Richter; Ralf ; et al. | 2010-12-30 |
Method for removing a passivation layer prior to depositing a barrier layer in a copper metallization layer
Grant 7,820,536 - Schuehrer , et al. October 26, 2 | 2010-10-26 |
Semiconductor substrate having a protection layer at the substrate back side
Grant 7,781,343 - Letz , et al. August 24, 2 | 2010-08-24 |
Void Sealing In A Dielectric Material Of A Contact Level Of A Semiconductor Device Comprising Closely Spaced Transistors
App 20100193963 - Richter; Ralf ; et al. | 2010-08-05 |
Test structure for determining characteristics of semiconductor alloys in SOI transistors by x-ray diffraction
Grant 7,763,476 - Frohberg , et al. July 27, 2 | 2010-07-27 |
Reducing Metal Voids In A Metallization Layer Stack Of A Semiconductor Device By Providing A Dielectric Barrier Layer
App 20100109161 - Schuehrer; Holger ; et al. | 2010-05-06 |
Method And Apparatus For Reducing Semiconductor Package Tensile Stress
App 20100102435 - RYAN; E. Todd ; et al. | 2010-04-29 |
Reducing Contamination Of Semiconductor Substrates During Beol Processing By Performing A Deposition/etch Cycle During Barrier Deposition
App 20090325378 - Koschinsky; Frank ; et al. | 2009-12-31 |
Technique for non-destructive metal delamination monitoring in semiconductor devices
Grant 7,638,424 - Richter , et al. December 29, 2 | 2009-12-29 |
Method and semiconductor structure for monitoring the fabrication of interconnect structures and contacts in a semiconductor device
Grant 7,491,555 - Lehr , et al. February 17, 2 | 2009-02-17 |
Method of reducing contamination by removing an interlayer dielectric from the substrate edge
Grant 7,410,885 - Schuehrer , et al. August 12, 2 | 2008-08-12 |
Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress
Grant 7,396,718 - Frohberg , et al. July 8, 2 | 2008-07-08 |
Semiconductor Substrate Having A Protection Layer At The Substrate Back Side
App 20080132072 - Letz; Tobias ; et al. | 2008-06-05 |
Test Structure For Determining Characteristics Of Semiconductor Alloys In Soi Transistors By X-ray Diffraction
App 20080012073 - Frohberg; Kai ; et al. | 2008-01-17 |
Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer
Grant 7,259,091 - Schuehrer , et al. August 21, 2 | 2007-08-21 |
Technique For Non-destructive Metal Delamination Monitoring In Semiconductor Devices
App 20070178691 - Richter; Ralf ; et al. | 2007-08-02 |
Method Of Reducing Contamination By Providing An Etch Stop Layer At The Substrate Edge
App 20070155133 - Richter; Ralf ; et al. | 2007-07-05 |
Method For Removing A Passivation Layer Prior To Depositing A Barrier Layer In A Copper Metallization Layer
App 20070123034 - Schuehrer; Holger ; et al. | 2007-05-31 |
Method And Semiconductor Structure For Monitoring The Fabrication Of Interconnect Structures And Contacts In A Semiconductor Device
App 20070048883 - LEHR; MATTHIAS ; et al. | 2007-03-01 |
Method Of Reducing Contamination By Removing An Interlayer Dielectric From The Substrate Edge
App 20070026670 - Schuehrer; Holger ; et al. | 2007-02-01 |
Technique for forming self-aligned vias in a metallization layer
App 20060246718 - Frohberg; Kai ; et al. | 2006-11-02 |
Method of forming electrical connections in a semiconductor structure
App 20060141775 - Schuehrer; Holger ; et al. | 2006-06-29 |
Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress
App 20060091471 - Frohberg; Kai ; et al. | 2006-05-04 |
Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer
App 20060024951 - Schuehrer; Holger ; et al. | 2006-02-02 |
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