Schroeder; Friedrich

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schroeder; Friedrich.The latest application filed is for "circuit for addition of multiple binary numbers".

Company Profile

2.13.17

Schroeder; Friedrich - Stuttgart DE
Schroeder; Friedrich - Boeblingen DE
Schroeder; Friedrich - Wesel DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Circuit for addition of multiple binary numbers Grant 10,528,323 - Beck , et al. J	2020-01-07
Cross bar switch structure for highly congested environments Grant 10,333,508 - Barowski , et al.	2019-06-25
Circuit For Addition Of Multiple Binary Numbers App 20190034165 - BECK; Manuel ; et al.	2019-01-31
Circuit for addition of multiple binary numbers Grant 10,168,991 - Beck , et al. J	2019-01-01
Method to synthesize a cross bar switch in a highly congested environment Grant 10,169,511 - Lind , et al. J	2019-01-01
Cross Bar Switch Structure For Highly Congested Environments App 20180287598 - BAROWSKI; Harry ; et al.	2018-10-04
Method To Synthesize A Cross Bar Switch In A Highly Congested Environment App 20180285486 - LIND; Kurt ; et al.	2018-10-04
Detecting circuit design flaws based on timing analysis Grant 10,031,995 - Haller , et al. July 24, 2	2018-07-24
Detecting dispensable inverter chains in a circuit design Grant 9,996,656 - Krauch , et al. June 12, 2	2018-06-12
Circuit For Addition Of Multiple Binary Numbers App 20180088907 - BECK; Manuel ; et al.	2018-03-29
Detecting Dispensable Inverter Chains In A Circuit Design App 20170371998 - KRAUCH; Ulrich ; et al.	2017-12-28
Pipeline depth exploration in a register transfer level design description of an electronic circuit Grant 9,684,749 - Boersma , et al. June 20, 2	2017-06-20
Detecting Circuit Design Flaws Based On Timing Analysis App 20170083658 - Haller; Wilhelm ; et al.	2017-03-23
Pipeline Depth Exploration In A Register Transfer Level Design Description Of An Electronic Circuit App 20150234968 - Boersma; Maarten J. ; et al.	2015-08-20
Creating an end point report based on a comprehensive timing report Grant 9,064,069 - Lind , et al. June 23, 2	2015-06-23
Creating An End Point Report Based On A Comprehensive Timing Report App 20150169813 - Lind; Kurt ; et al.	2015-06-18
Simd Accelerator For Data Comparison App 20130227250 - Haller; Wilhelm ; et al.	2013-08-29
Method for controlling the supply voltage for an integrated circuit and an apparatus with a voltage regulation module and an integrated circuit Grant 8,471,624 - Bonsels , et al. June 25, 2	2013-06-25
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20130113545 - Bonsels; Stefan ; et al.	2013-05-09
Multistage, hybrid synthesis processing facilitating integrated circuit layout Grant 8,316,335 - Barowski , et al. November 20, 2	2012-11-20
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20120218031 - Bonsels; Stefan ; et al.	2012-08-30
Multistage, Hybrid Synthesis Processing Facilitating Integrated Circuit Layout App 20120151429 - BAROWSKI; Harry ; et al.	2012-06-14
System and Method for Placing Integrated Circuit Functional Blocks According to Dataflow Width App 20120005643 - Schroeder; Friedrich ; et al.	2012-01-05
Circuit design methodology to reduce leakage power Grant 7,795,914 - Gemmeke , et al. September 14, 2	2010-09-14
Method For Controlling The Supply Voltage For An Integrated Circuit And An Apparatus With A Voltage Regulation Module And An Integrated Circuit App 20100013446 - Bonsels; Stefan ; et al.	2010-01-21
Circuit Design Methodology To Reduce Leakage Power App 20090115504 - Gemmeke; Tobias ; et al.	2009-05-07
Housing for a radio device having a thin electrically conductive film applied to an exterior surface thereof Grant 5,731,963 - Heiss , et al. March 24, 1	1998-03-24

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