Scholz; Harold N.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Scholz; Harold N..The latest application filed is for "signal distribution scheme in field programmable gate array (fpga) or field programmable system chip (fpsc) including cycle stealing units".
- Scholz; Harold N. - Allentown PA
- Scholz, Harold N. - Allentwon PA
| Patent | Date |
|---|---|
| Programmable interconnect for reconfigurable system-on-chip Grant 7,650,545 - Abramovici , et al. January 19, 2 | 2010-01-19 |
| Bitline twisting scheme for multiport memory Grant 7,414,913 - Fenstermaker , et al. August 19, 2 | 2008-08-19 |
| Output clock phase-alignment circuit Grant 7,253,674 - Johnson , et al. August 7, 2 | 2007-08-07 |
| Address isolation for user-defined configuration memory in programmable devices Grant 7,196,963 - Fenstermaker , et al. March 27, 2 | 2007-03-27 |
| Signal distribution scheme in field programmable gate array (FPGA) or field programmable system chip (FPSC) including cycle stealing units Grant 6,486,705 - Andrews , et al. November 26, 2 | 2002-11-26 |
| Multi-functional I/O buffers in a field programmable gate array (FPGA) Grant 6,480,026 - Andrews , et al. November 12, 2 | 2002-11-12 |
| Signal distribution scheme in field programmable gate array (FPGA) or field programmable system chip (FPSC) including cycle stealing units App 20020003445 - Andrews, William B. ; et al. | 2002-01-10 |
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