Schoch; Daniel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schoch; Daniel.The latest application filed is for "end-to-end adaptive deep learning training and inference method and tool chain to improve performance and shorten development cycles".

Company Profile

1.8.14

Schoch; Daniel - Irvine CA
Schoch; Daniel - Costa Mesa CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
End-to-end Adaptive Deep Learning Training And Inference Method And Tool Chain To Improve Performance And Shorten Development Cycles App 20220309347 - Elkhatib; Mouna ; et al.	2022-09-29
Always-on Local Action Controller For Low Power, Battery-operated Autonomous Intelligent Devices App 20220309343 - Elkhatib; Mouna ; et al.	2022-09-29
Always-on Wake On Multi-dimensional Pattern Detection (wompd) From A Sensor Fusion Circuitry App 20220270592 - Elkhatib; Mouna ; et al.	2022-08-25
Wake Word Method To Prolong The Conversational State Between Human And A Machine In Edge Devices App 20220139379 - Elkhatib; Mouna ; et al.	2022-05-05
Adaptive Tuning Parameters For A Classification Neural Network App 20220114447 - Elkhatib; Mouna ; et al.	2022-04-14
Low Power Multi-stage Selectable Neural Network Suppression App 20220092389 - Elkhatib; Mouna ; et al.	2022-03-24
Built-in-self test for high-speed serial bit stream multiplexing and demultiplexing chip set Grant 7,672,340 - Schoch , et al. March 2, 2	2010-03-02
Signal line selection and polarity change of natural bit ordering in high-speed serial bit stream multiplexing and demultiplexing integrated circuits Grant 7,630,410 - Nejad , et al. December 8, 2	2009-12-08
Low-speed DLL employing a digital phase interpolator based upon a high-speed clock Grant 7,334,153 - Schoch February 19, 2	2008-02-19
Low-Speed DLL Employing a Digital Phase Interpolator based upon a High-Speed Clock App 20070192651 - Schoch; Daniel	2007-08-16
Low-speed DLL employing a digital phase interpolator based upon a high-speed clock Grant 7,210,057 - Schoch April 24, 2	2007-04-24
Low-speed DLL employing a digital phase interpolator based upon a high-speed clock App 20060288250 - Schoch; Daniel	2006-12-21
Switchable power domains for 1.2v and 3.3v pad voltages Grant 7,098,692 - Joshi , et al. August 29, 2	2006-08-29
Low-speed DLL employing a digital phase interpolator based upon a high-speed clock Grant 7,082,546 - Schoch July 25, 2	2006-07-25
Apparatus and methods for initializing integrated circuit addresses Grant 6,996,644 - Schoch , et al. February 7, 2	2006-02-07
Switchable power domains for 1.2V and 3.3V pad voltages Grant 6,943,587 - Joshi , et al. September 13, 2	2005-09-13
Switchable power domains for 1.2v and 3.3v pad voltages App 20050156653 - Joshi, Sridevi R. ; et al.	2005-07-21
Switchable power domains for 1.2V and 3.3V pad voltages App 20040027160 - Joshi, Sridevi R. ; et al.	2004-02-12
Signal line selection and polarity change of natural bit ordering in high-speed serial bit stream multiplexing and demultiplexing integrated circuits App 20040028085 - Nejad, Mohammad ; et al.	2004-02-12
Low-speed DLL employing a digital phase interpolator based upon a high-speed clock App 20040027158 - Schoch, Daniel	2004-02-12
Built-in-self test for high-speed serial bit stream multiplexing and demultiplexing chip set App 20040028065 - Schoch, Daniel ; et al.	2004-02-12
Apparatus and methods for initializing integrated circuit addresses App 20020188781 - Schoch, Daniel ; et al.	2002-12-12

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