loadpatents
name:-0.009861946105957
name:-0.0080370903015137
name:-0.00042986869812012
Schnabel; Florian Patent Filings

Schnabel; Florian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schnabel; Florian.The latest application filed is for "method of producing an integrated circuit having a capacitor".

Company Profile
0.8.8
  • Schnabel; Florian - Hoehenkirchen DE
  • Schnabel; Florian - Hohenkirchen DE
  • Schnabel, Florian - Wappingers Falls NY
  • Schnabel; Florian - Wappinger Falls NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of producing an integrated circuit having a capacitor with a supporting layer
Grant 7,727,837 - Gruening-von Schwerin , et al. June 1, 2
2010-06-01
Memory with clock-controlled memory access and method of operating the same
Grant 7,663,965 - Roewer , et al. February 16, 2
2010-02-16
Memory component having a novel arrangement of the bit lines
Grant 7,414,906 - Schnabel , et al. August 19, 2
2008-08-19
Method Of Producing An Integrated Circuit Having A Capacitor
App 20080182378 - Gruening-von Schwerin; Ulrike ;   et al.
2008-07-31
Memory with Clock-Controlled Memory Access and Method of Operating the Same
App 20070291554 - Roewer; Falk ;   et al.
2007-12-20
Semiconductor memory device
Grant 7,166,900 - Mun , et al. January 23, 2
2007-01-23
Method for the automatic provision of repair position data of fuse elements in integrated memory circuit
App 20060282720 - Hofsaess; Markus ;   et al.
2006-12-14
Electronic component with improved precharging
App 20060250868 - Schnabel; Florian ;   et al.
2006-11-09
Memory component having a novel arrangement of the bit lines
App 20060152988 - Schnabel; Florian ;   et al.
2006-07-13
Apparatus and method for writing to and/or reading from a memory cell in a semiconductor memory
App 20060133172 - Schnabel; Florian ;   et al.
2006-06-22
Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit
Grant 6,977,862 - Schnabel , et al. December 20, 2
2005-12-20
Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit
App 20050117416 - Schnabel, Florian ;   et al.
2005-06-02
Device interconnection
App 20050116342 - Clevenger, Lawrence A. ;   et al.
2005-06-02
Device interconnection
Grant 6,870,263 - Clevenger , et al. March 22, 2
2005-03-22
Method of making a microelectronic structure
Grant 6,221,757 - Schmidbauer , et al. April 24, 2
2001-04-24
CMP process using indicator areas to determine endpoint
Grant 5,972,787 - Boggs , et al. October 26, 1
1999-10-26

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