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Patent applications and USPTO patent grants for Schmitz; William J..The latest application filed is for "compensating for jitter during ddr3 memory delay line training".
Patent | Date |
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Compensating For Jitter During Ddr3 Memory Delay Line Training App 20120296598 - Chafin; Craig R. ;   et al. | 2012-11-22 |
Systems and methods for assessing timing of PCI signals Grant 7,289,925 - Grimes , et al. October 30, 2 | 2007-10-30 |
Systems and methods for analyzing data of a SAS/SATA device App 20060259278 - Schmitz; William J. ;   et al. | 2006-11-16 |
Systems and methods for analyzing data of a SAS/SATA device Grant 7,120,557 - Schmitz , et al. October 10, 2 | 2006-10-10 |
Systems and methods for assessing timing of PCI signals App 20050138490 - Grimes, Gordon Keith ;   et al. | 2005-06-23 |
Systems and methods for analyzing data of an SPI data bus Grant 6,895,365 - Voorhees , et al. May 17, 2 | 2005-05-17 |
Testing implementation for signal characterization Grant 6,822,459 - Romero , et al. November 23, 2 | 2004-11-23 |
Systems and methods for analyzing data of an SPI data bus App 20040215420 - Voorhees, William W. ;   et al. | 2004-10-28 |
Systems and methods for analyzing data of a SAS/SATA device App 20040215421 - Schmitz, William J. ;   et al. | 2004-10-28 |
Method and apparatus for generating CRC/parity error in network environment App 20040153891 - Slutz, Mark ;   et al. | 2004-08-05 |
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