Schlenger; Marc

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schlenger; Marc.The latest application filed is for "method for programming a programmable gate array in a distributed computer system".

Company Profile

1.5.5

Schlenger; Marc - Paderborn DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for programming a programmable gate array in a distributed computer system Grant 11,442,884 - Agne , et al. September 13, 2	2022-09-13
Method For Programming A Programmable Gate Array In A Distributed Computer System App 20210303501 - AGNE; Andreas ; et al.	2021-09-30
Method for troubleshooting the program logic of a system of distributed progammable gate arrays Grant 11,017,141 - Kalte , et al. May 25, 2	2021-05-25
Method For Troubleshooting The Program Logic Of A System Of Distributed Progammable Gate Arrays App 20200364392 - KALTE; Heiko ; et al.	2020-11-19
Method for detecting the topology of electrical wiring Grant 10,224,930 - Lubeley , et al.	2019-03-05
Method For Detecting The Topology Of Electrical Wiring App 20180323784 - Lubeley; Dominik ; et al.	2018-11-08
Method for determining the power consumption of a programmable logic device Grant 10,102,325 - Lubeley , et al. October 16, 2	2018-10-16
Flexible allocation of I/O channels of a hardware component Grant 9,811,361 - Merten , et al. November 7, 2	2017-11-07
Method For Determining The Power Consumption Of A Programmable Logic Device App 20170116363 - LUBELEY; Dominik ; et al.	2017-04-27
Flexible Allocation Of I/o Channels Of A Hardware Component App 20140324408 - MERTEN; Stefan ; et al.	2014-10-30

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