Schleicher; James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schleicher; James.The latest application filed is for "peripheral tool".

Company Profile

3.35.16

Schleicher; James - Los Gatos CA
Schleicher; James - San Jose CA
Schleicher; James - Santa Clara CA
Schleicher; James - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Peripheral Tool App 20210042462 - Schleicher; James	2021-02-11
Peripheral tool Grant 10,803,225 - Schleicher October 13, 2	2020-10-13
Peripheral Tool App 20200242210 - Schleicher; James	2020-07-30
Omnibus logic element Grant 10,177,766 - Schleicher , et al. J	2019-01-08
Omnibus logic element Grant 9,496,875 - Schleicher , et al. November 15, 2	2016-11-15
Omnibus logic element Grant 8,878,567 - Schleicher , et al. November 4, 2	2014-11-04
Omnibus logic element for packing or fracturing Grant 8,593,174 - Schleicher , et al. November 26, 2	2013-11-26
Omnibus logic element for packing or fracturing Grant 8,237,465 - Schleicher , et al. August 7, 2	2012-08-07
Omnibus logic element for packing or fracturing Grant 7,911,230 - Schleicher , et al. March 22, 2	2011-03-22
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 7,839,167 - Ngai , et al. November 23, 2	2010-11-23
Omnibus logic element Grant 7,671,625 - Schleicher , et al. March 2, 2	2010-03-02
Interconnection And Input/output Resources For Programmable Logic Integrated Circuit Devices App 20090289660 - Ngai; Tony ; et al.	2009-11-26
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage Grant 7,594,208 - Borer , et al. September 22, 2	2009-09-22
Logic cell supporting addition of three binary words Grant 7,565,388 - Baeckler , et al. July 21, 2	2009-07-21
Omnibus logic element Grant 7,538,579 - Schleicher , et al. May 26, 2	2009-05-26
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 7,492,188 - Ngai , et al. February 17, 2	2009-02-17
Interconnection and input/output resources for programmable logic integrated circuit devices App 20080074143 - Ngai; Tony ; et al.	2008-03-27
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 7,317,332 - Ngai , et al. January 8, 2	2008-01-08
Interconnection resources for programmable logic integrated circuit devices Grant 7,262,635 - Schleicher , et al. August 28, 2	2007-08-28
Bypass-able carry chain in a programmable logic device Grant 7,205,791 - Lee , et al. April 17, 2	2007-04-17
Interconnection resources for programmable logic integrated circuit devices App 20070080710 - Schleicher; James ; et al.	2007-04-12
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage Grant 7,181,703 - Borer , et al. February 20, 2	2007-02-20
Interconnection and input/output resources for programmable logic integrated circuit devices App 20070030029 - Ngai; Tony ; et al.	2007-02-08
Omnibus logic element including look up table based logic elements Grant 7,167,022 - Schleicher , et al. January 23, 2	2007-01-23
Interconnection resources for programmable logic integrated circuit devices Grant 7,123,052 - Schleicher , et al. October 17, 2	2006-10-17
Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency Grant 7,119,575 - Schleicher , et al. October 10, 2	2006-10-10
Initializing a carry chain in a programmable logic device Grant 7,061,268 - Lee , et al. June 13, 2	2006-06-13
LUT-based logic element with support for Shannon decomposition and associated method Grant 7,030,652 - Lewis , et al. April 18, 2	2006-04-18
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 6,989,689 - Ngai , et al. January 24, 2	2006-01-24
Interconnection resources for programmable logic integrated circuit devices App 20050218930 - Schleicher, James ; et al.	2005-10-06
Interconnection resources for programmable logic integrated circuit devices Grant 6,897,680 - Schleicher , et al. May 24, 2	2005-05-24
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 6,894,533 - Ngai , et al. May 17, 2	2005-05-17
Programmable logic device architectures with super-regions having logic regions and a memory region Grant 6,879,183 - Jefferson , et al. April 12, 2	2005-04-12
Interconnection and input/output resources for programmable logic integrated circuit devices App 20040251930 - Ngai, Tony ; et al.	2004-12-16
Interconnection resources for programmable logic integrated circuit devices App 20040222818 - Schleicher, James ; et al.	2004-11-11
Programmable logic devices with bidirect ional cascades Grant 6,747,480 - Kaptanoglu , et al. June 8, 2	2004-06-08
Interconnection resources for programmable logic integrated circuit devices Grant 6,727,727 - Schleicher , et al. April 27, 2	2004-04-27
Interconnection and input/output resources for programmable logic integrated circuit devices App 20030210073 - Ngai, Tony ; et al.	2003-11-13
Interconnection and input/output resources for programable logic integrated circuit devices Grant 6,614,261 - Ngai , et al. September 2, 2	2003-09-02
Programmable logic device architectures with super-regions having logic regions and a memory region App 20030080778 - Jefferson, David E. ; et al.	2003-05-01
Interconnection resources for programmable logic integrated circuit devices App 20030071654 - Schleicher, James ; et al.	2003-04-17
Programmable logic device architectures with super-regions having logic regions and a memory region App 20020084801 - Jefferson, David E. ; et al.	2002-07-04
Interconnection and input/output resources for programmable logic integrated circuit devices Grant 6,407,576 - Ngai , et al. June 18, 2	2002-06-18
Interconnection and input/output resources for programable logic integrated circuit devices App 20020057103 - Ngai, Tony ; et al.	2002-05-16
Interconnection resources for programmable logic integrated circuit devices App 20020041192 - Schleicher, James ; et al.	2002-04-11
Method and apparatus for reducing memory resources in a programmable logic device Grant 6,362,646 - Schleicher March 26, 2	2002-03-26
Programmable logic device architectures App 20010006348 - Jefferson, David E. ; et al.	2001-07-05
Programmable logic device architecture with super-regions having logic regions and a memory region Grant 6,215,326 - Jefferson , et al. April 10, 2	2001-04-10
Programmable logic array device design using parameterized logic modules Grant 6,173,245 - Karchmer , et al. January 9, 2	2001-01-09
Programmable logic device incorporating a memory efficient interconnection device Grant 6,057,707 - Schleicher , et al. May 2, 2	2000-05-02

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