loadpatents
name:-0.021968126296997
name:-0.025460004806519
name:-0.016856908798218
Schlanger; Erik Patent Filings

Schlanger; Erik

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schlanger; Erik.The latest application filed is for "systems and methods for implementing an intelligence processing computing architecture".

Company Profile
16.23.20
  • Schlanger; Erik - Austin TX
  • - Austin TX US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Systems And Methods For Implementing An Intelligence Processing Computing Architecture
App 20220276983 - Fick; David ;   et al.
2022-09-01
Systems and methods for implementing an intelligence processing computing architecture
Grant 11,360,932 - Fick , et al. June 14, 2
2022-06-14
Processor load using a bit vector to calculate effective address
Grant 10,877,755 - Schlanger , et al. December 29, 2
2020-12-29
Systems And Methods For Implementing An Intelligence Processing Computing Architecture
App 20200192858 - Fick; David ;   et al.
2020-06-18
Processor core to coprocessor interface with FIFO semantics
Grant 10,614,023 - Brown , et al.
2020-04-07
Systems and methods for implementing an intelligence processing computing architecture
Grant 10,606,797 - Fick , et al.
2020-03-31
Multi-purpose events for notification and sequence control in multi-core processor systems
Grant 10,599,488 - Brown , et al.
2020-03-24
System on a chip hardware block for translating commands from processor to read boot code from off-chip non-volatile memory device
Grant 10,579,391 - Schlanger , et al.
2020-03-03
Systems And Methods For Implementing An Intelligence Processing Computing Architecture
App 20200012617 - Fick; David ;   et al.
2020-01-09
Systems And Methods For Implementing An Intelligence Processing Computing Architecture
App 20200012616 - Fick; David ;   et al.
2020-01-09
Systems and methods for implementing an intelligence processing computing architecture
Grant 10,521,395 - Fick , et al. Dec
2019-12-31
Processor Core To Coprocessor Interface With Fifo Semantics
App 20190324939 - Brown; David A. ;   et al.
2019-10-24
Tuple encoding aware direct memory access engine for scratchpad enabled multi-core processors
Grant 10,402,425 - Brown , et al. Sep
2019-09-03
Processor core to coprocessor interface with FIFO semantics
Grant 10,380,058 - Brown , et al. A
2019-08-13
Processor Load Using A Bit Vector To Calculate Effective Address
App 20190187988 - Schlanger; Erik ;   et al.
2019-06-20
Processor load using a bit vector to calculate effective address
Grant 10,216,515 - Schlanger , et al. Feb
2019-02-26
Row identification number generation in database direct memory access engine
Grant 10,176,114 - Brown , et al. J
2019-01-08
Tuple Encoding Aware Direct Memory Access Engine For Scratchpad Enabled Multi-core Processors
App 20180329975 - BROWN; DAVID A. ;   et al.
2018-11-15
Tuple encoding aware direct memory access engine for scratchpad enabled multicore processors
Grant 10,061,714 - Brown , et al. August 28, 2
2018-08-28
Database tuple-encoding-aware data partitioning in a direct memory access engine
Grant 10,061,832 - Brown , et al. August 28, 2
2018-08-28
Run length encoding aware direct memory access filtering engine for scratchpad enabled multicore processors
Grant 10,055,358 - Brown , et al. August 21, 2
2018-08-21
Database Tuple-encoding-aware Data Partitioning In A Direct Memory Access Engine
App 20180150542 - BROWN; DAVID A. ;   et al.
2018-05-31
Row Identification Number Generation In Database Direct Memory Access Engine
App 20180150407 - BROWN; DAVID A. ;   et al.
2018-05-31
Processor Load Using A Bit Vector To Calculate Effective Address
App 20180107482 - Schlanger; Erik ;   et al.
2018-04-19
Processor Core To Coprocessor Interface With FIFO Semantics
App 20180067889 - Brown; David A. ;   et al.
2018-03-08
Multi-Purpose Events for Notification and Sequence Control in Multi-core Processor Systems
App 20180004581 - BROWN; DAVID A. ;   et al.
2018-01-04
Tuple Encoding Aware Direct Memory Access Engine For Scratchpad Enabled Multicore Processors
App 20170270052 - BROWN; DAVID A. ;   et al.
2017-09-21
Run Length Encoding Aware Direct Memory Access Filtering Engine For Scratchpad Enabled Multicore Processors
App 20170270053 - BROWN; DAVID A. ;   et al.
2017-09-21
Configurable logic constructs in a loop buffer
Grant 9,557,997 - Basant , et al. January 31, 2
2017-01-31
System On A Chip Hardware Block For Translating Commands From Processor To Read Boot Code From Off-chip Non-volatile Memory Device
App 20150039874 - Schlanger; Erik ;   et al.
2015-02-05
Configurable Logic Constructs In A Loop Buffer
App 20150026434 - Basant; Aarti ;   et al.
2015-01-22
System, method and device for processing macroblock video data
Grant 8,923,384 - Schlanger , et al. December 30, 2
2014-12-30
System, method and device for processing macroblock video data
Grant 08923384 -
2014-12-30
Piecewise processing of overlap smoothing and in-loop deblocking
Grant 8,576,924 - Kwan , et al. November 5, 2
2013-11-05
System, method and device to encode and decode video data having multiple video data formats
Grant 8,462,841 - Schlanger , et al. June 11, 2
2013-06-11
Macroblock cache
Grant 7,965,773 - Schlanger , et al. June 21, 2
2011-06-21
Scratch pad for storing intermediate loop filter data
Grant 7,792,385 - Kwan , et al. September 7, 2
2010-09-07
System, method and device for processing macroblock video data
App 20090168893 - Schlanger; Erik ;   et al.
2009-07-02
System, method and device to encode and decode video data having multiple video data formats
App 20090168899 - Schlanger; Erik ;   et al.
2009-07-02
Piecewise processing of overlap smoothing and in-loop deblocking
App 20060165181 - Kwan; Bill ;   et al.
2006-07-27
Scratch pad for storing intermediate loop filter data
App 20060165164 - Kwan; Bill ;   et al.
2006-07-27

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