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Schillaci; Paolino Patent Filings

Schillaci; Paolino

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schillaci; Paolino.The latest application filed is for "synchronous memory device with reduced power consumption".

Company Profile
0.7.7
  • Schillaci; Paolino - I-92025 Casteltermini AG
  • Schillaci; Paolino - Casteltermini IT
  • Schillaci, Paolino - Casteltermini AG
  • Schillaci, Paolino - Castel Termini IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated memory device with multi-sector selection commands
Grant 7,457,908 - Perroni , et al. November 25, 2
2008-11-25
Synchronous memory device with reduced power consumption
Grant 7,366,012 - Perroni , et al. April 29, 2
2008-04-29
Automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards
Grant 7,231,487 - Schillaci , et al. June 12, 2
2007-06-12
Non-volatile memory device architecture, for instance a flash kind, having a serial communication interface
Grant 7,151,705 - Polizzi , et al. December 19, 2
2006-12-19
Method of writing a group of data bytes in a memory and memory device
Grant 6,996,697 - Poli , et al. February 7, 2
2006-02-07
Synchronous memory device with reduced power consumption
App 20050270892 - Perroni, Maurizio Francesco ;   et al.
2005-12-08
Non-volatile memory device architecture, for instance a flash kind, having a serial communication interface
App 20050213421 - Polizzi, Salvatore ;   et al.
2005-09-29
Structure for updating a block of memory cells in a flash memory device with erase and program operation reduction
Grant 6,922,362 - La Malfa , et al. July 26, 2
2005-07-26
Integrated memory device with multi-sector selection commands
App 20050157553 - Perroni, Maurizio Francesco ;   et al.
2005-07-21
Fast page programming architecture and method in a non-volatile memory device with an SPI interface
Grant 6,885,584 - Schillaci , et al. April 26, 2
2005-04-26
Fast Page Programming Architecture And Method In A Non-volatile Memory Device With An Spi Interface
App 20050041471 - Schillaci, Paolino ;   et al.
2005-02-24
Structure for updating a block of memory cells in a flash memory device with erase and program operation reduction
App 20040141379 - La Malfa, Antonino ;   et al.
2004-07-22
Automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards
App 20040083327 - Schillaci, Paolino ;   et al.
2004-04-29
Method of writing a group of data bytes in a memory and memory device
App 20030182533 - Poli, Salvatore ;   et al.
2003-09-25

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