Scheuerlein; Roy Edwin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Scheuerlein; Roy Edwin.The latest application filed is for "method for non-volatile memory having 3d array of read/write elements with efficient decoding of vertical bit lines and word lines".

Company Profile

0.23.6

Scheuerlein; Roy Edwin - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines Grant 9,245,629 - Samachisa , et al. January 26, 2	2016-01-26
Non-volatile 3D memory with cell-selectable word line decoding Grant 9,123,392 - Yan , et al. September 1, 2	2015-09-01
Method For Non-Volatile Memory Having 3D Array of Read/Write Elements with Efficient Decoding of Vertical Bit Lines and Word Lines App 20140043911 - Samachisa; George ; et al.	2014-02-13
Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines Grant 8,547,720 - Samachisa , et al. October 1, 2	2013-10-01
Non-Volatile Memory Having 3d Array of Read/Write Elements with Efficient Decoding of Vertical Bit Lines and Word Lines App 20110299314 - Samachisa; George ; et al.	2011-12-08
Magnetic random access memory using memory cells with rotated magnetic storage elements Grant 6,975,555 - Lu , et al. December 13, 2	2005-12-13
Magnetic random access memory using memory cells with rotated magnetic storage elements App 20050094445 - Lu, Yu ; et al.	2005-05-05
Magnetic Random Access Memory Using Memory Cells With Rotated Magnetic Storage Elements App 20040240266 - Lu, Yu ; et al.	2004-12-02
Magnetic random access memory using memory cells with rotated magnetic storage elements Grant 6,816,431 - Lu , et al. November 9, 2	2004-11-09
Architecture for high-speed magnetic memories Grant 6,778,431 - Gogl , et al. August 17, 2	2004-08-17
Architecture For High-speed Magnetic Memories App 20040114439 - Gogl, Dietmar ; et al.	2004-06-17
Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method of forming the same Grant 6,562,634 - Bronner , et al. May 13, 2	2003-05-13
Magnetic random access memory using a non-linear memory element select mechanism Grant 6,515,897 - Monsma , et al. February 4, 2	2003-02-04
Unified memory hard disk drive system Grant 6,430,660 - Kemp , et al. August 6, 2	2002-08-06
Data-dependent field compensation for writing magnetic random access memories Grant 6,404,671 - Reohr , et al. June 11, 2	2002-06-11
Segmented write line architecture for writing magnetic random access memories Grant 6,335,890 - Reohr , et al. January 1, 2	2002-01-01
Magnetic random access memory using a series tunnel element select mechanism Grant 6,331,944 - Monsma , et al. December 18, 2	2001-12-18
Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method of forming the same App 20010010938 - Bronner, Gary Bela ; et al.	2001-08-02
Magnetic random access memory using current through MTJ write mechanism Grant 6,269,018 - Monsma , et al. July 31, 2	2001-07-31
Interconnection network for connecting memory cells to sense amplifiers Grant 6,269,040 - Reohr , et al. July 31, 2	2001-07-31
Diode connected to a magnetic tunnel junction and self aligned with a metallic conductor and method for forming the same Grant 6,242,770 - Bronner , et al. June 5, 2	2001-06-05
Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same Grant 6,180,444 - Gates , et al. January 30, 2	2001-01-30
Voltage biasing for magnetic RAM with magnetic tunnel memory cells Grant 6,130,835 - Scheuerlein October 10, 2	2000-10-10
Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes Grant 6,097,625 - Scheuerlein August 1, 2	2000-08-01
Magnetic memory array with paired asymmetric memory cells for improved write margin Grant 6,005,800 - Koch , et al. December 21, 1	1999-12-21
Voltage biasing for magnetic ram with magnetic tunnel memory cells Grant 5,991,193 - Gallagher , et al. November 23, 1	1999-11-23
Read circuit for magnetic memory array using magnetic tunnel junction devices Grant 5,793,697 - Scheuerlein August 11, 1	1998-08-11
Magnetic memory array using magnetic tunnel junction devices in the memory cells Grant 5,640,343 - Gallagher , et al. June 17, 1	1997-06-17

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