Scheuerlein; Roy E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Scheuerlein; Roy E..The latest application filed is for "3d memory having vertical switches with surround gates and method thereof".

Company Profile

0.200.200

Scheuerlein; Roy E. - Cupertino CA
Scheuerlein; Roy E - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Three dimensional hexagonal matrix memory array Grant RE46,435 - Scheuerlein , et al. June 13, 2	2017-06-13
Three dimensional non-volatile storage with connected word lines Grant 9,646,688 - Scheuerlein May 9, 2	2017-05-09
Low forming voltage non-volatile storage device Grant 9,576,660 - Lan , et al. February 21, 2	2017-02-21
3D Memory Having Vertical Switches with Surround Gates and Method Thereof App 20170040381 - Chen; Yung-Tin ; et al.	2017-02-09
Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same Grant 9,472,301 - Bandyopadhyay , et al. October 18, 2	2016-10-18
Method of operating FET low current 3D re-ram Grant 9,368,207 - Bandyopadhyay , et al. June 14, 2	2016-06-14
Low Forming Voltage Non-volatile Storage Device App 20160133325 - Lan; Zhida ; et al.	2016-05-12
Low forming voltage non-volatile storage device Grant 9,269,425 - Lan , et al. February 23, 2	2016-02-23
Methods and apparatus for reducing programming time of a memory cell Grant 9,202,539 - Thorp , et al. December 1, 2	2015-12-01
Three Dimensional Non-volatile Storage With Connected Word Lines App 20150325292 - Scheuerlein; Roy E.	2015-11-12
Dielectric-based Memory Cells Having Multi-level One-time Programmable And Bi-level Rewriteable Operating Modes And Methods Of Forming The Same App 20150325310 - Bandyopadhyay; Abhijit ; et al.	2015-11-12
Three dimensional non-volatile storage with interleaved vertical select devices above and below vertical bit lines Grant 9,171,584 - Scheuerlein , et al. October 27, 2	2015-10-27
Storage sub-system for a computer comprising write-once memory devices and write-many memory devices and related method Grant 9,152,562 - Scheuerlein , et al. October 6, 2	2015-10-06
Floating body memory cell system and method of manufacture Grant 9,111,800 - Scheuerlein August 18, 2	2015-08-18
Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same Grant 9,105,576 - Chen , et al. August 11, 2	2015-08-11
Three-dimensional memory structures having shared pillar memory cells Grant 9,076,518 - Scheuerlein , et al. July 7, 2	2015-07-07
Three dimensional non-volatile storage with connected word lines Grant 9,065,044 - Scheuerlein June 23, 2	2015-06-23
Method Of Operating FET Low Current 3D Re-Ram App 20150170742 - Bandyopadhyay; Abhijit ; et al.	2015-06-18
Three dimensional non-volatile storage with three device driver for row select Grant 9,059,401 - Scheuerlein June 16, 2	2015-06-16
Temperature compensation of conductive bridge memory arrays Grant 9,047,983 - Scheuerlein , et al. June 2, 2	2015-06-02
Three dimensional non-volatile storage with asymmetrical vertical select devices Grant 9,048,422 - Scheuerlein June 2, 2	2015-06-02
Three dimensional non-volatile storage with dual layers of select devices Grant 9,030,859 - Scheuerlein , et al. May 12, 2	2015-05-12
Resistance-switching memory cells adapted for use at low voltage Grant 9,006,795 - Yang , et al. April 14, 2	2015-04-14
Method of operating FET low current 3D Re-RAM Grant 8,995,169 - Bandyopadhyay , et al. March 31, 2	2015-03-31
FET LOW CURRENT 3D ReRAM NON-VOLATILE STORAGE App 20150070965 - Bandyopadhyay; Abhijit ; et al.	2015-03-12
Method Of Operating Fet Low Current 3d Re-ram App 20150070966 - Bandyopadhyay; Abhijit ; et al.	2015-03-12
Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning Grant 8,969,923 - Scheuerlein , et al. March 3, 2	2015-03-03
Method of making a TFT charge storage memory cell having high-mobility corrugated channel Grant 8,946,017 - Scheuerlein February 3, 2	2015-02-03
3D memory with vertical bit lines and staircase word lines and vertical switches and methods thereof Grant 8,923,050 - Cernea , et al. December 30, 2	2014-12-30
Erase for 3D non-volatile memory with sequential selection of word lines Grant 8,908,444 - Costa , et al. December 9, 2	2014-12-09
Multi-level Memory Arrays With Memory Cells That Employ Bipolar Storage Elements And Methods Of Forming The Same App 20140346433 - Chen; Yung-Tin ; et al.	2014-11-27
Continuous mesh three dimensional non-volatile storage with vertical select devices Grant 8,883,569 - Scheuerlein November 11, 2	2014-11-11
Continuous mesh three dimensional non-volatile storage with vertical select devices Grant 8,885,389 - Scheuerlein November 11, 2	2014-11-11
Three dimensional non-volatile storage with dual gated vertical select devices Grant 8,885,381 - Scheuerlein November 11, 2	2014-11-11
Methods And Apparatus For Layout Of Three Dimensional Matrix Array Memory For Reduced Cost Patterning App 20140328105 - Scheuerlein; Roy E. ; et al.	2014-11-06
Set/reset algorithm which detects and repairs weak cells in resistive-switching memory device Grant 8,861,258 - Lan , et al. October 14, 2	2014-10-14
Erase for 3D non-volatile memory with sequential selection of word lines Grant 8,861,280 - Costa , et al. October 14, 2	2014-10-14
Memory cell comprising a carbon nanotube fabric element and a steering element Grant 8,847,200 - Herner , et al. September 30, 2	2014-09-30
Three dimensional non-volatile storage with multi block row selection Grant 8,848,415 - Scheuerlein , et al. September 30, 2	2014-09-30
Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same Grant 8,841,648 - Chen , et al. September 23, 2	2014-09-23
Methods And Apparatus For Reducing Programming Time Of A Memory Cell App 20140269129 - Thorp; Tyler J. ; et al.	2014-09-18
Erase For 3D Non-Volatile Memory With Sequential Selection Of Word Lines App 20140247661 - Costa; Xiying ; et al.	2014-09-04
Dielectric-based Memory Cells Having Multi-level One-time Programmable And Bi-level Rewriteable Operating Modes And Methods Of Forming The Same App 20140241031 - Bandyopadhyay; Abhijit ; et al.	2014-08-28
Three Dimensional Non-volatile Storage With Asymmetrical Vertical Select Devices App 20140242764 - Scheuerlein; Roy E.	2014-08-28
Set/Reset Algorithm Which Detects And Repairs Weak Cells In Resistive-Switching Memory Device App 20140233299 - Lan; Zhida ; et al.	2014-08-21
Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning Grant 8,809,128 - Scheuerlein , et al. August 19, 2	2014-08-19
Temperature Compensation Of Conductive Bridge Memory Arrays App 20140226393 - Scheuerlein; Roy E. ; et al.	2014-08-14
Methods and apparatus for reducing programming time of a memory cell Grant 8,773,898 - Thorp , et al. July 8, 2	2014-07-08
Non-volatile Storage System With Dual Block Programming App 20140185351 - Yan; Tianhong ; et al.	2014-07-03
Optimization of critical dimensions and pitch of patterned features in and above a substrate Grant 8,766,332 - Cleeves , et al. July 1, 2	2014-07-01
Three dimensional non-volatile storage with asymmetrical vertical select devices Grant 8,755,223 - Scheuerlein June 17, 2	2014-06-17
Resistance-switching Memory Cells Adapted For Use At Low Voltage App 20140158974 - Yang; Xiaoyu ; et al.	2014-06-12
Temperature compensation of conductive bridge memory arrays Grant 8,750,066 - Scheuerlein , et al. June 10, 2	2014-06-10
Methods of forming pillars for memory cells using sequential sidewall patterning Grant 8,741,696 - Scheuerlein , et al. June 3, 2	2014-06-03
Non-volatile storage system with dual block programming Grant 8,699,293 - Yan , et al. April 15, 2	2014-04-15
Re-writable resistance-switching memory with balanced series stack Grant 8,693,233 - Scheuerlein , et al. April 8, 2	2014-04-08
Resistance-switching memory cells adapted for use at low voltage Grant 8,686,476 - Yang , et al. April 1, 2	2014-04-01
Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning Grant 8,679,967 - Scheuerlein , et al. March 25, 2	2014-03-25
Continuous Mesh Three Dimensional Non-volatile Storage With Vertical Select Devices App 20140078851 - Scheuerlein; Roy E.	2014-03-20
Continuous Mesh Three Dimensional Non-volatile Storage With Vertical Select Devices App 20140080272 - Scheuerlein; Roy E.	2014-03-20
Three-dimensional memory device incorporating segmented array line memory array Grant 8,659,028 - Scheuerlein , et al. February 25, 2	2014-02-25
Single device driver circuit to control three-dimensional memory element array Grant 8,659,932 - Scheuerlein February 25, 2	2014-02-25
Erase For 3D Non-Volatile Memory With Sequential Selection Of Word Lines App 20140043916 - Costa; Xiying ; et al.	2014-02-13
Multi-bit resistance-switching memory cell Grant 8,649,206 - Scheuerlein February 11, 2	2014-02-11
Temperature Compensation Of Conductive Bridge Memory Arrays App 20140029356 - Scheuerlein; Roy E. ; et al.	2014-01-30
Three-dimensional memory device incorporating segmented array line memory array Grant 8,637,870 - Scheuerlein , et al. January 28, 2	2014-01-28
Methods and apparatus for increasing memory density using diode layer sharing Grant 8,633,528 - Xu , et al. January 21, 2	2014-01-21
Three dimensional non-volatile storage with dual gate selection of vertical bit lines Grant 8,619,453 - Scheuerlein December 31, 2	2013-12-31
Continuous mesh three dimensional non-volatile storage with vertical select devices Grant 8,618,614 - Scheuerlein December 31, 2	2013-12-31
3d Memory With Vertical Bit Lines And Staircase Word Lines And Vertical Switches And Methods Thereof App 20130339571 - Cernea; Raul Adrian ; et al.	2013-12-19
3d Memory Having Vertical Switches With Surround Gates And Method Thereof App 20130336037 - Chen; Yung-Tin ; et al.	2013-12-19
Cross point non-volatile memory cell Grant 8,605,486 - Scheuerlein December 10, 2	2013-12-10
Methods And Apparatus For Increasing Memory Density Using Diode Layer Sharing App 20130313503 - Xu; Huiwen ; et al.	2013-11-28
Methods Involving Memory With High Dielectric Constant Antifuses Adapted For Use At Low Voltage App 20130314971 - Yang; Xiaoyu ; et al.	2013-11-28
Three Dimensional Non-volatile Storage With Interleaved Vertical Select Devices Above And Below Vertical Bit Lines App 20130308363 - Scheuerlein; Roy E. ; et al.	2013-11-21
Structure and method for biasing phase change memory array for reliable writing Grant 8,576,609 - Scheuerlein November 5, 2	2013-11-05
Temperature compensation of conductive bridge memory arrays Grant 8,576,651 - Scheuerlein , et al. November 5, 2	2013-11-05
Methods of programming two terminal memory cells Grant 8,565,015 - Thorp , et al. October 22, 2	2013-10-22
Apparatus For Forming Memory Lines And Vias In Three Dimensional Memory Arrays Using Dual Damascene Process And Imprint Lithography App 20130264675 - Scheuerlein; Roy E.	2013-10-10
Three dimensional memory system with page of data across word lines Grant 8,553,476 - Yan , et al. October 8, 2	2013-10-08
Methods And Apparatus For Reducing Programming Time Of A Memory Cell App 20130242681 - Thorp; Tyler J. ; et al.	2013-09-19
Memory cell that includes a carbon-based memory element and methods of forming the same Grant 8,536,015 - Scheuerlein , et al. September 17, 2	2013-09-17
Methods and apparatus for extending the effective thermal operating range of a memory Grant 8,531,904 - Thorp , et al. September 10, 2	2013-09-10
Memory array circuit incorporating multiple array block selection and related method Grant 8,509,025 - Scheuerlein , et al. August 13, 2	2013-08-13
Temperature Compensation Of Conductive Bridge Memory Arrays App 20130188431 - Scheuerlein; Roy E. ; et al.	2013-07-25
Multi-bit resistance-switching memory cell Grant 8,482,960 - Scheuerlein July 9, 2	2013-07-09
Low Forming Voltage Non-volatile Storage Device App 20130170283 - Lan; Zhida ; et al.	2013-07-04
Methods and apparatus for forming memory lines and vias in three dimensional memory arrays using dual damascene process and imprint lithography Grant 8,466,068 - Scheuerlein June 18, 2	2013-06-18
Methods Of Programming Two Terminal Memory Cells App 20130148421 - Thorp; Tyler J. ; et al.	2013-06-13
Antifuse-based Memory Cells Having Multiple Memory States And Methods Of Forming The Same App 20130148404 - Bandyopadhyay; Abhijit ; et al.	2013-06-13
Memory system with reversible resistivity-switching using pulses of alternatrie polarity Grant 8,462,580 - Rabkin , et al. June 11, 2	2013-06-11
Structure And Method For Biasing Phase Change Memory Array For Reliable Writing App 20130135925 - Scheuerlein; Roy E.	2013-05-30
Resistance-switching Memory Cells Adapted For Use At Low Voltage App 20130119338 - Yang; Xiaoyu ; et al.	2013-05-16
Reducing programming time of a memory cell Grant 8,441,849 - Thorp , et al. May 14, 2	2013-05-14
Structure and method for biasing phase change memory array for reliable writing Grant 8,385,141 - Scheuerlein February 26, 2	2013-02-26
Flexible multi-pulse set operation for phase-change memories Grant 8,379,437 - Thorp , et al. February 19, 2	2013-02-19
Cross Point Non-volatile Memory Cell App 20130021837 - Scheuerlein; Roy E.	2013-01-24
Memory system with reversible resistivity-switching using pulses of alternate polarity Grant 8,355,271 - Rabkin , et al. January 15, 2	2013-01-15
Storage Sub-system For A Computer Comprising Write-once Memory Devices And Write-many Memory Devices And Related Method App 20130013847 - Scheuerlein; Roy E. ; et al.	2013-01-10
Optimization Of Critical Dimensions And Pitch Of Patterned Features In And Above A Substrate App 20130009230 - Cleeves; James M. ; et al.	2013-01-10
Memory with high dielectric constant antifuses adapted for use at low voltage Grant 8,350,299 - Yang , et al. January 8, 2	2013-01-08
Single Device Driver Circuit to Control Three-Dimensional Memory Element Array App 20130003440 - Scheuerlein; Roy E.	2013-01-03
Semiconductor memory with improved block switching Grant 8,320,196 - Yan , et al. November 27, 2	2012-11-27
Methods involving memory with high dielectric constant antifuses adapted for use at low voltage Grant 8,314,023 - Yang , et al. November 20, 2	2012-11-20
Methods and apparatus for increasing memory density using diode layer sharing Grant 8,309,415 - Xu , et al. November 13, 2	2012-11-13
Capacitive discharge method for writing to non-volatile memory Grant 8,310,892 - Scheuerlein , et al. November 13, 2	2012-11-13
Non-volatile Storage System With Dual Block Programming App 20120275210 - Yan; Tianhong ; et al.	2012-11-01
Optimization of critical dimensions and pitch of patterned features in and above a substrate Grant 8,283,706 - Cleeves , et al. October 9, 2	2012-10-09
Single device driver circuit to control three-dimensional memory element array Grant 8,284,589 - Scheuerlein October 9, 2	2012-10-09
Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same Grant 8,279,704 - Scheuerlein , et al. October 2, 2	2012-10-02
Storage sub-system for a computer comprising write-once memory devices and write-many memory devices and related method Grant 8,275,927 - Scheuerlein , et al. September 25, 2	2012-09-25
Cross point non-volatile memory cell Grant 8,270,199 - Scheuerlein September 18, 2	2012-09-18
Programming non-volatile storage element using current from other element Grant 8,270,202 - Scheuerlein September 18, 2	2012-09-18
Pulse reset for non-volatile storage Grant 8,270,210 - Scheuerlein September 18, 2	2012-09-18
Three Dimensional Memory System With Page Of Data Across Word Lines App 20120224409 - Yan; Tianhong ; et al.	2012-09-06
Reducing Programming Time Of A Memory Cell App 20120155163 - Thorp; Tyler ; et al.	2012-06-21
Memory cell and methods of forming a memory cell comprising a carbon nanotube fabric element and a steering element Grant 8,203,864 - Herner , et al. June 19, 2	2012-06-19
Three Dimensional Non-volatile Storage With Three Device Driver For Row Select App 20120147647 - Scheuerlein; Roy E.	2012-06-14
Three Dimensional Non-volatile Storage With Asymmetrical Vertical Select Devices App 20120147652 - Scheuerlein; Roy E.	2012-06-14
Three Dimensional Non-volatile Storage With Dual Layers Of Select Devices App 20120147651 - Scheuerlein; Roy E. ; et al.	2012-06-14
Continuous Mesh Three Dimensional Non-volatile Storage With Vertical Select Devices App 20120147644 - Scheuerlein; Roy E.	2012-06-14
Three Dimensional Non-volatile Storage With Connected Word Lines App 20120147646 - Scheuerlein; Roy E.	2012-06-14
Three Dimensional Non-volatile Storage With Multi Block Row Selection App 20120147689 - Scheuerlein; Roy E. ; et al.	2012-06-14
Three Dimensional Non-volatile Storage With Dual Gate Selection Of Vertical Bit Lines App 20120147648 - Scheuerlein; Roy E.	2012-06-14
Three Dimensional Non-volatile Storage With Dual Gated Vertical Select Devices App 20120147645 - Scheuerlein; Roy E.	2012-06-14
Multi-Bit Resistance-Switching Memory Cell App 20120140546 - Scheuerlein; Roy E.	2012-06-07
Multi-Bit Resistance-Switching Memory Cell App 20120140547 - Scheuerlein; Roy E.	2012-06-07
Three-Dimensional Memory Structures Having Shared Pillar Memory Cells App 20120135580 - Scheuerlein; Roy E. ; et al.	2012-05-31
Re-writable Resistance-Switching Memory With Balanced Series Stack App 20120127779 - Scheuerlein; Roy E. ; et al.	2012-05-24
Memory System With Reversible Resistivity-switching Using Pulses Of Alternatrie Polarity App 20120120710 - Rabkin; Peter ; et al.	2012-05-17
Memory System With Reversible Resistivity-switching Using Pulses Of Alternatrie Polarity App 20120120711 - Rabkin; Peter ; et al.	2012-05-17
Memory Cell That Includes A Carbon-based Memory Element And Methods Of Forming The Same App 20120119178 - Scheuerlein; Roy E. ; et al.	2012-05-17
Tft Charge Storage Memory Cell Having High-mobility Corrugated Channel App 20120115289 - Scheuerlein; Roy E.	2012-05-10
Three-dimensional Memory Device Incorporating Segmented Array Line Memory Array App 20120106253 - Scheuerlein; Roy E. ; et al.	2012-05-03
Multi-level Memory Arrays With Memory Cells That Employ Bipolar Storage Elements And Methods Of Forming The Same App 20120091427 - Chen; Yung-Tin ; et al.	2012-04-19
Rewritable memory device with multi-level, write-once memory cells Grant 8,149,607 - Scheuerlein , et al. April 3, 2	2012-04-03
Multi-bit resistance-switching memory cell Grant 8,139,391 - Scheuerlein March 20, 2	2012-03-20
Method for fabricating high density pillar structures by double patterning using positive photoresist Grant 8,138,010 - Scheuerlein , et al. March 20, 2	2012-03-20
Reducing programming time of a memory cell Grant 8,125,822 - Thorp , et al. February 28, 2	2012-02-28
Single Device Driver Circuit to Control Three-Dimensional Memory Element Array App 20120044733 - Scheuerlein; Roy E.	2012-02-23
Three-dimensional memory structures having shared pillar memory cells Grant 8,120,068 - Scheuerlein , et al. February 21, 2	2012-02-21
TFT charge storage memory cell having high-mobility corrugated channel Grant 8,110,863 - Scheuerlein February 7, 2	2012-02-07
Memory cell that includes a carbon-based memory element and methods of forming the same Grant 8,110,476 - Scheuerlein , et al. February 7, 2	2012-02-07
Self-aligned three-dimensional non-volatile memory fabrication Grant 8,105,867 - Matamis , et al. January 31, 2	2012-01-31
Three dimensional hexagonal matrix memory array Grant 8,107,270 - Scheuerlein , et al. January 31, 2	2012-01-31
Structure and method for biasing phase change memory array for reliable writing Grant 8,102,698 - Scheuerlein January 24, 2	2012-01-24
Reverse set with current limit for non-volatile storage Grant 8,098,511 - Scheuerlein , et al. January 17, 2	2012-01-17
Capacitive Discharge Method For Writing To Non-volatile Memory App 20120008373 - Scheuerlein; Roy E. ; et al.	2012-01-12
Memory array incorporating noise detection line Grant 8,094,510 - Scheuerlein January 10, 2	2012-01-10
Semiconductor Memory With Improved Block Switching App 20120002476 - Yan; Thomas ; et al.	2012-01-05
Structure And Method For Biasing Phase Change Memory Array For Reliable Writing App 20110310662 - Scheuerlein; Roy E.	2011-12-22
Memory Array Circuit Incorporating Multiple Array Block Selection And Related Method App 20110299354 - Scheuerlein; Roy E. ; et al.	2011-12-08
Methods And Apparatus For Extending The Effective Thermal Operating Range Of A Memory App 20110292751 - Thorp; Tyler ; et al.	2011-12-01
Capacitive discharge method for writing to non-volatile memory Grant 8,059,447 - Scheuerlein , et al. November 15, 2	2011-11-15
Memory Cell Comprising A Carbon Nanotube Fabric Element And A Steering Element App 20110266514 - Herner; S. Brad ; et al.	2011-11-03
Semiconductor memory with improved memory block switching Grant 8,050,109 - Yan , et al. November 1, 2	2011-11-01
Creating short program pulses in asymmetric memory arrays Grant 8,040,721 - Thorp , et al. October 18, 2	2011-10-18
Programming Non-volatile Storage Element Using Current From Other Element App 20110235405 - Scheuerlein; Roy E.	2011-09-29
Pulse Reset For Non-volatile Storage App 20110235404 - Scheuerlein; Roy E.	2011-09-29
Multiple series passive element matrix cell for three-dimensional arrays Grant 8,014,185 - Scheuerlein September 6, 2	2011-09-06
Method To Program A Memory Cell Comprising A Carbon Nanotube Fabric Element And A Steering Element App 20110210305 - Herner; S. Brad ; et al.	2011-09-01
Reversible-polarity decoder circuit and method Grant 8,004,927 - Scheuerlein , et al. August 23, 2	2011-08-23
Methods and apparatus for extending the effective thermal operating range of a memory Grant 8,004,919 - Thorp , et al. August 23, 2	2011-08-23
Memory cell comprising a carbon nanotube fabric element and a steering element Grant 7,982,209 - Herner , et al. July 19, 2	2011-07-19
Method For Fabricating High Density Pillar Structures By Double Patterning Using Positive Photoresist App 20110171809 - Scheuerlein; Roy E. ; et al.	2011-07-14
Programming non-volatile storage element using current from other element Grant 7,978,498 - Scheuerlein July 12, 2	2011-07-12
Pulse reset for non-volatile storage Grant 7,978,507 - Scheuerlein July 12, 2	2011-07-12
Rewritable Memory Device with Multi-Level, Write-Once Memory Cells App 20110149631 - Scheuerlein; Roy E. ; et al.	2011-06-23
Non-volatile multi-level re-writable memory cell incorporating a diode in series with multiple resistors and method for writing same Grant 7,961,494 - Scheuerlein June 14, 2	2011-06-14
Shared masks for x-lines and shared masks for y-lines for fabrication of 3D memory arrays Grant 7,943,515 - Scheuerlein May 17, 2	2011-05-17
Programming a memory cell with a diode in series by applying reverse bias Grant 7,944,728 - Nian , et al. May 17, 2	2011-05-17
Structure And Method For Biasing Phase Change Memory Array For Reliable Writing App 20110110149 - Scheuerlein; Roy E.	2011-05-12
Reduced complexity array line drivers for 3D matrix arrays Grant 7,940,554 - Scheuerlein , et al. May 10, 2	2011-05-10
Method for fabricating high density pillar structures by double patterning using positive photoresist Grant 7,935,553 - Scheuerlein , et al. May 3, 2	2011-05-03
Apparatus And Methods Of Forming Memory Lines And Structures Using Double Sidewall Patterning For Four Times Half Pitch Relief Patterning App 20110095434 - Scheuerlein; Roy E. ; et al.	2011-04-28
Methods Of Forming Pillars For Memory Cells Using Sequential Sidewall Patterning App 20110095338 - Scheuerlein; Roy E. ; et al.	2011-04-28
Methods And Apparatus For Layout Of Three Dimensional Matrix Array Memory For Reduced Cost Patterning App 20110095438 - Scheuerlein; Roy E. ; et al.	2011-04-28
Method to program a memory cell comprising a carbon nanotube fabric element and a steering element Grant 7,924,602 - Herner , et al. April 12, 2	2011-04-12
Quad memory cell and method of making same Grant 7,923,812 - Scheuerlein April 12, 2	2011-04-12
Reverse Set With Current Limit For Non-volatile Storage App 20110075468 - Scheuerlein; Roy E. ; et al.	2011-03-31
Quad memory cell and method of making same Grant 7,910,407 - Scheuerlein March 22, 2	2011-03-22
Flexible Multi-pulse Set Operation For Phase-change Memories App 20110051506 - Thorp; Tyler ; et al.	2011-03-03
Reducing Programming Time Of A Memory Cell App 20110051505 - Thorp; Tyler ; et al.	2011-03-03
Creating Short Program Pulses In Asymmetric Memory Arrays App 20110051504 - Thorp; Tyler ; et al.	2011-03-03
Method of making a pillar pattern using triple or quadruple exposure Grant 7,887,999 - Scheuerlein , et al. February 15, 2	2011-02-15
Semiconductor Memory With Improved Memory Block Switching App 20110032774 - Yan; Thomas ; et al.	2011-02-10
Decoder Circuitry Providing Forward And Reverse Modes Of Memory Array Operation And Method For Biasing Same App 20110019495 - Scheuerlein; Roy E. ; et al.	2011-01-27
Floating Body Memory Cell System And Method Of Manufacture App 20110007541 - Scheuerlein; Roy E.	2011-01-13
Reverse set with current limit for non-volatile storage Grant 7,869,258 - Scheuerlein , et al. January 11, 2	2011-01-11
Structure and method for biasing phase change memory array for reliable writing Grant 7,859,884 - Scheuerlein December 28, 2	2010-12-28
Methods And Apparatus For Forming Line And Pillar Structures For Three Dimensional Memory Arrays Using A Double Subtractive Process And Imprint Lithography App 20100301449 - Scheuerlein; Roy E. ; et al.	2010-12-02
Memory Array Incorporating Noise Detection Line App 20100290301 - Scheuerlein; Roy E.	2010-11-18
Three dimensional hexagonal matrix memory array App 20100290262 - Scheuerlein; Roy E. ; et al.	2010-11-18
Nonvolatile rewritable memory cell comprising a resistivity-switching oxide or nitride and an antifuse Grant 7,829,875 - Scheuerlein November 9, 2	2010-11-09
Floating body memory cell system and method of manufacture Grant 7,830,722 - Scheuerlein November 9, 2	2010-11-09
Memory With High Dielectric Constant Antifuses Adapted For Use At Low Voltage App 20100276660 - Yang; Xiaoyu ; et al.	2010-11-04
Methods And Apparatus For Extending The Effective Thermal Operating Range Of A Memory App 20100271894 - Thorp; Tyler ; et al.	2010-10-28
Reduced complexity array line drivers for 3D matrix arrays App 20100271885 - Scheuerlein; Roy E. ; et al.	2010-10-28
Sidewall structured switchable resistor cell Grant 7,812,335 - Scheuerlein October 12, 2	2010-10-12
Cross Point Non-volatile Memory Cell App 20100254175 - Scheuerlein; Roy E.	2010-10-07
Programming Non-Volatile Storage Element Using Current From Other Element App 20100254177 - Scheuerlein; Roy E.	2010-10-07
Multi-Bit Resistance-Switching Memory Cell App 20100254176 - Scheuerlein; Roy E.	2010-10-07
Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance Grant 7,800,933 - Kumar , et al. September 21, 2	2010-09-21
Method For Fabricating High Density Pillar Structures By Double Patterning Using Positive Photoresist App 20100219510 - Scheuerlein; Roy E. ; et al.	2010-09-02
Triangle two dimensional complementary patterning of pillars Grant 7,781,269 - Wang , et al. August 24, 2	2010-08-24
Methods and apparatus for extending the effective thermal operating range of a memory Grant 7,773,446 - Thorp , et al. August 10, 2	2010-08-10
Current sensing method and apparatus for a memory array Grant 7,773,443 - Scheuerlein August 10, 2	2010-08-10
Floating body memory cell system and method of manufacture Grant 7,764,549 - Scheuerlein July 27, 2	2010-07-27
Two terminal nonvolatile memory using gate controlled diode elements Grant 7,764,534 - Thorp , et al. July 27, 2	2010-07-27
Three dimensional hexagonal matrix memory array Grant 7,746,680 - Scheuerlein , et al. June 29, 2	2010-06-29
Three-Dimensional Memory Structures Having Shared Pillar Memory Cells App 20100155784 - Scheuerlein; Roy E. ; et al.	2010-06-24
Quad memory cell and method of making same App 20100155689 - Scheuerlein; Roy E.	2010-06-24
Programming a memory cell with a diode in series by applying reverse bias App 20100157652 - Nian; Yibo ; et al.	2010-06-24
Quad memory cell and method of making same App 20100157653 - Scheuerlein; Roy E.	2010-06-24
Method To Program A Memory Cell Comprising A Carbon Nanotube Fabric Element And A Steering Element App 20100142255 - Herner; S. Brad ; et al.	2010-06-10
Method Of Programming A Nonvolatile Memory Cell By Reverse Biasing A Diode Steering Element To Set A Storage Element App 20100142256 - KUMAR; Tanmay ; et al.	2010-06-10
Cross point memory cell with distributed diodes and method of making same Grant 7,733,685 - Scheuerlein , et al. June 8, 2	2010-06-08
Method for fabricating high density pillar structures by double patterning using positive photoresist Grant 7,732,235 - Scheuerlein , et al. June 8, 2	2010-06-08
Self-Aligned Three-Dimensional Non-Volatile Memory Fabrication App 20100124813 - Matamis; George ; et al.	2010-05-20
Systems for controlled pulse operations in non-volatile memory Grant 7,719,874 - Scheuerlein , et al. May 18, 2	2010-05-18
Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers Grant 7,697,366 - Fasoli , et al. April 13, 2	2010-04-13
Cooperative charge pump circuit and method Grant 7,696,812 - Al-Shamma , et al. April 13, 2	2010-04-13
Shared masks for x-lines and shared masks for y-lines for fabrication of 3D memory arrays App 20100059796 - Scheuerlein; Roy E.	2010-03-11
Method to program a memory cell comprising a carbon nanotube fabric and a steering element Grant 7,667,999 - Herner , et al. February 23, 2	2010-02-23
Methods And Apparatus For Increasing Memory Density Using Diode Layer Sharing App 20100038623 - Xu; Huiwen ; et al.	2010-02-18
Methods and apparatus for extending the effective thermal operating range of a memory Grant 7,656,734 - Thorp , et al. February 2, 2	2010-02-02
Carbon-based Resistivity-switching Materials And Methods Of Forming The Same App 20100006812 - Xu; Huiwen ; et al.	2010-01-14
Cross point memory cell with distributed diodes and method of making same App 20100008124 - Scheuerlein; Roy E. ; et al.	2010-01-14
Multiple series passive element matrix cell for three-dimensional arrays App 20100008123 - Scheuerlein; Roy E.	2010-01-14
Pulse Reset For Non-volatile Storage App 20090323394 - Scheuerlein; Roy E.	2009-12-31
Triangle two dimensional complementary patterning of pillars App 20090321789 - Wang; Chun-Ming ; et al.	2009-12-31
Reverse Set With Current Limit For Non-volatile Storage App 20090323391 - Scheuerlein; Roy E. ; et al.	2009-12-31
Capacitive Discharge Method For Writing To Non-volatile Memory App 20090323393 - Scheuerlein; Roy E. ; et al.	2009-12-31
Method for fabricating high density pillar structures by double patterning using positive photoresist App 20090323385 - Scheuerlein; Roy E. ; et al.	2009-12-31
Hierarchical bit line bias bus for block selectable memory array Grant 7,633,828 - Scheuerlein , et al. December 15, 2	2009-12-15
Memory Cell That Includes A Carbon-based Memory Element And Methods Of Forming The Same App 20090256132 - Scheuerlein; Roy E. ; et al.	2009-10-15
Sidewall structured switchable resistor cell App 20090256129 - Scheuerlein; Roy E.	2009-10-15
Non-volatile Multi-level Re-writable Memory Cell Incorporating A Diode In Series With Multiple Resistors And Method For Writing Same App 20090257267 - Scheuerlein; Roy E.	2009-10-15
Method for using a hierarchical bit line bias bus for block selectable memory array Grant 7,596,050 - Scheuerlein , et al. September 29, 2	2009-09-29
Method for using two data busses for memory array block selection Grant 7,570,523 - Scheuerlein , et al. August 4, 2	2009-08-04
Current Sensing Method And Apparatus For A Memory Array App 20090175094 - Scheuerlein; Roy E.	2009-07-09
Two terminal nonvolatile memory using gate controlled diode elements App 20090168492 - Thorp; Tyler J. ; et al.	2009-07-02
Methods And Apparatus For Forming Memory Lines And Vias In Three Dimensional Memory Arrays Using Dual Damascene Process And Imprint Lithography App 20090166682 - SCHEUERLEIN; ROY E.	2009-07-02
Three dimensional hexagonal matrix memory array App 20090168480 - Scheuerlein; Roy E. ; et al.	2009-07-02
Storage Sub-system For A Computer Comprising Write-once Memory Devices And Write-many Memory Devices And Related Method App 20090172321 - Scheuerlein; Roy E. ; et al.	2009-07-02
Method of making a pillar pattern using triple or quadruple exposure App 20090170030 - Scheuerlein; Roy E. ; et al.	2009-07-02
Passive element memory array incorporating reversible polarity word line and bit line decoders Grant 7,554,832 - Fasoli , et al. June 30, 2	2009-06-30
Reversible-polarity Decoder Circuit And Method App 20090161474 - Scheuerlein; Roy E. ; et al.	2009-06-25
Methods Involving Memory With High Dielectric Constant Antifuses Adapted For Use At Low Voltage App 20090141535 - Yang; Xiaoyu ; et al.	2009-06-04
Memory With High Dielectric Constant Antifuses Adapted For Use At Low Voltage App 20090140299 - Yang; Xiaoyu ; et al.	2009-06-04
Method for reading a multi-level passive element memory cell array Grant 7,542,338 - Scheuerlein , et al. June 2, 2	2009-06-02
Apparatus for reading a multi-level passive element memory cell array Grant 7,542,337 - Scheuerlein , et al. June 2, 2	2009-06-02
Reversible polarity decoder circuit Grant 7,542,370 - Yan , et al. June 2, 2	2009-06-02
Cooperative Charge Pump Circuit And Method App 20090115498 - Al-Shamma; Ali K. ; et al.	2009-05-07
Floating Body Memory Cell System and Method of Manufacture App 20090116270 - Scheuerlein; Roy E.	2009-05-07
Digital content kiosk and methods for use therewith App 20090113116 - Thompson; E. Earle ; et al.	2009-04-30
Method for using a reversible polarity decoder circuit Grant 7,525,869 - Yan , et al. April 28, 2	2009-04-28
Controlled pulse operations in non-volatile memory Grant 7,522,448 - Scheuerlein , et al. April 21, 2	2009-04-21
Multiple Antifuse Memory Cells And Methods To Form, Program, And Sense The Same App 20090086521 - Herner; S. Brad ; et al.	2009-04-02
Memory array incorporating mirrored NAND strings and non-shared global bit lines within a block Grant 7,508,714 - Fasoli , et al. March 24, 2	2009-03-24
Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same Grant 7,505,321 - Scheuerlein , et al. March 17, 2	2009-03-17
Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics Grant 7,505,344 - Scheuerlein March 17, 2	2009-03-17
High bandwidth one time field-programmable memory Grant 7,499,355 - Scheuerlein , et al. March 3, 2	2009-03-03
Systems for high bandwidth one time field-programmable memory Grant 7,499,304 - Scheuerlein , et al. March 3, 2	2009-03-03
Method for using dual data-dependent busses for coupling read/write circuits to a memory array Grant 7,499,366 - Scheuerlein , et al. March 3, 2	2009-03-03
Reverse bias trim operations in non-volatile memory Grant 7,495,947 - Scheuerlein , et al. February 24, 2	2009-02-24
Method for using a multiple polarity reversible charge pump circuit Grant 7,495,500 - Al-Shamma , et al. February 24, 2	2009-02-24
Systems for reverse bias trim operations in non-volatile memory Grant 7,492,630 - Scheuerlein , et al. February 17, 2	2009-02-17
Dual data-dependent busses for coupling read/write circuits to a memory array Grant 7,486,587 - Scheuerlein , et al. February 3, 2	2009-02-03
Method for using a mixed-use memory array with different data states Grant 7,486,537 - Scheuerlein , et al. February 3, 2	2009-02-03
Multiple polarity reversible charge pump circuit Grant 7,477,093 - Al-Shamma , et al. January 13, 2	2009-01-13
High density contact to relaxed geometry layers Grant 7,474,000 - Scheuerlein , et al. January 6, 2	2009-01-06
Methods And Apparatus For Extending The Effective Thermal Operating Range Of A Memory App 20090003110 - Thorp; Tyler ; et al.	2009-01-01
Methods And Apparatus For Extending The Effective Thermal Operating Range Of A Memory App 20090003109 - Thorp; Tyler ; et al.	2009-01-01
Optimization Of Critical Dimensions And Pitch Of Patterned Features In And Above A Substrate App 20080310231 - Cleeves; James M. ; et al.	2008-12-18
Write-once nonvolatile phase change memory array Grant 7,465,951 - Scheuerlein December 16, 2	2008-12-16
Method for using a passive element memory array incorporating reversible polarity word line and bit line decoders Grant 7,463,546 - Fasoli , et al. December 9, 2	2008-12-09
Memory array incorporating two data busses for memory array block selection Grant 7,463,536 - Scheuerlein , et al. December 9, 2	2008-12-09
Method for using a mixed-use memory array Grant 7,450,414 - Scheuerlein November 11, 2	2008-11-11
Method for using a multi-use memory cell and memory array Grant 7,447,056 - Scheuerlein , et al. November 4, 2	2008-11-04
NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same Grant 7,433,233 - Chen , et al. October 7, 2	2008-10-07
Memory Cell Comprising A Carbon Nanotube Fabric Element And A Steering Element App 20080237599 - Herner; S. Brad ; et al.	2008-10-02
Method To Form A Memory Cell Comprising A Carbon Nanotube Fabric Element And A Steering Element App 20080239790 - Herner; S. Brad ; et al.	2008-10-02
Switchable resistive memory with opposite polarity write pulses Grant 7,426,128 - Scheuerlein September 16, 2	2008-09-16
Optimization of critical dimensions and pitch of patterned features in and above a substrate Grant 7,423,304 - Cleeves , et al. September 9, 2	2008-09-09
Integrated Circuit Memory Array Configuration Including Decoding Compatibility With Partial Implementation Of Multiple Memory Layers App 20080192524 - Fasoli; Luca G. ; et al.	2008-08-14
Method For Using A Reversible Polarity Decoder Circuit App 20080159052 - Yan; Tianhong ; et al.	2008-07-03
Reversible Polarity Decoder Circuit App 20080159053 - Yan; Tianhong ; et al.	2008-07-03
Multiple Polarity Reversible Charge Pump Circuit App 20080157854 - Al-Shamma; Ali K. ; et al.	2008-07-03
Method For Using A Multiple Polarity Reversible Charge Pump Circuit App 20080157853 - Al-Shamma; Ali K. ; et al.	2008-07-03
Structure and Method for Biasing Phase Change Memory Array for Reliable Writing App 20080130352 - Scheuerlein; Roy E.	2008-06-05
System architecture and method for three-dimensional memory Grant 7,383,476 - Crowley , et al. June 3, 2	2008-06-03
Apparatus and method for programming an array of nonvolatile memory cells including switchable resistor memory elements Grant 7,362,604 - Scheuerlein April 22, 2	2008-04-22
Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers Grant 7,359,279 - Fasoli , et al. April 15, 2	2008-04-15
Forming nonvolatile phase change memory cell having a reduced thermal contact area Grant 7,351,992 - Scheuerlein April 1, 2	2008-04-01
Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements Grant 7,345,907 - Scheuerlein March 18, 2	2008-03-18
Hierarchical Bit Line Bias Bus For Block Selectable Memory Array App 20080025093 - Scheuerlein; Roy E. ; et al.	2008-01-31
Method For Using Dual Data-dependent Busses For Coupling Read/write Circuits To A Memory Array App 20080025133 - Scheuerlein; Roy E. ; et al.	2008-01-31
Mixed-use memory array with different data states App 20080025069 - Scheuerlein; Roy E. ; et al.	2008-01-31
Systems For Controlled Pulse Operations In Non-volatile Memory App 20080025077 - Scheuerlein; Roy E. ; et al.	2008-01-31
High Bandwidth One Time Field-programmable Memory App 20080025061 - Scheuerlein; Roy E. ; et al.	2008-01-31
Memory Array Incorporating Two Data Busses For Memory Array Block Selection App 20080025085 - Scheuerlein; Roy E. ; et al.	2008-01-31
Reverse Bias Trim Operations In Non-volatile Memory App 20080025068 - Scheuerlein; Roy E. ; et al.	2008-01-31
Dual Data-dependent Busses For Coupling Read/write Circuits To A Memory Array App 20080025131 - Scheuerlein; Roy E. ; et al.	2008-01-31
Mixed-use memory array App 20080023790 - Scheuerlein; Roy E.	2008-01-31
Method for using a mixed-use memory array App 20080025118 - Scheuerlein; Roy E.	2008-01-31
Passive Element Memory Array Incorporating Reversible Polarity Word Line And Bit Line Decoders App 20080025066 - Fasoli; Luca G. ; et al.	2008-01-31
Apparatus For Reading A Multi-level Passive Element Memory Cell Array App 20080025088 - Scheuerlein; Roy E. ; et al.	2008-01-31
Method for using a mixed-use memory array with different data states App 20080025062 - Scheuerlein; Roy E. ; et al.	2008-01-31
Controlled Pulse Operations In Non-volatile Memory App 20080025076 - Scheuerlein; Roy E. ; et al.	2008-01-31
Method For Reading A Multi-level Passive Element Memory Cell Array App 20080025089 - Scheuerlein; Roy E. ; et al.	2008-01-31
Method For Using Two Data Busses For Memory Array Block Selection App 20080025134 - Scheuerlein; Roy E. ; et al.	2008-01-31
Method For Using A Passive Element Memory Array Incorporating Reversible Polarity Word Line And Bit Line Decoders App 20080025132 - Fasoli; Luca G. ; et al.	2008-01-31
Method For Using A Hierarchical Bit Line Bias Bus For Block Selectable Memory Array App 20080025094 - Scheuerlein; Roy E. ; et al.	2008-01-31
Systems For High Bandwidth One Time Field-programmable Memory App 20080025067 - Scheuerlein; Roy E. ; et al.	2008-01-31
Systems For Reverse Bias Trim Operations In Non-volatile Memory App 20080025078 - Scheuerlein; Roy E. ; et al.	2008-01-31
Volatile memory cell two-pass writing method Grant 7,317,641 - Scheuerlein January 8, 2	2008-01-08
Structure and method for biasing phase change memory array for reliable writing Grant 7,307,268 - Scheuerlein December 11, 2	2007-12-11
Forming Nonvolatile Phase Change Memory Cell Having A Reduced Thermal Contact Area App 20070272913 - Scheuerlein; Roy E.	2007-11-29
Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operation Grant 7,298,665 - So , et al. November 20, 2	2007-11-20
Three-dimensional Memory Device Incorporating Segmented Array Line Memory Array App 20070263423 - Scheuerlein; Roy E. ; et al.	2007-11-15
Nand Memory Array Incorporating Capacitance Boosting Of Channel Regions In Unselected Memory Cells And Method For Operation Of Same App 20070242511 - Chen; En-Hsing ; et al.	2007-10-18
Nonvolatile rewritable memory cell comprising a resistivity-switching oxide or nitride and an antifuse App 20070228354 - Scheuerlein; Roy E.	2007-10-04
Memory Array Incorporating Memory Cells Arranged In Nand Strings App 20070217263 - Fasoli; Luca G. ; et al.	2007-09-20
Multi-use memory cell and memory array App 20070069276 - Scheuerlein; Roy E. ; et al.	2007-03-29
Memory with high dielectric constant antifuses and method for using at low voltage App 20070069241 - Yang; Xiaoyu ; et al.	2007-03-29
Method for using a multi-use memory cell and memory array App 20070070690 - Scheuerlein; Roy E. ; et al.	2007-03-29
Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance App 20070072360 - Kumar; Tanmay ; et al.	2007-03-29
Memory cell comprising a thin film three-terminal switching device having a metal source and /or drain region App 20070007579 - Scheuerlein; Roy E. ; et al.	2007-01-11
Three-dimensional non-volatile SRAM incorporating thin-film device layer App 20070008776 - Scheuerlein; Roy E.	2007-01-11
Nonvolatile memory cell comprising switchable resistor and transistor App 20070008773 - Scheuerlein; Roy E.	2007-01-11
Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements App 20070008786 - Scheuerlein; Roy E.	2007-01-11
Apparatus and method for programming an array of nonvolatile memory cells including switchable resistor memory elements App 20070008785 - Scheuerlein; Roy E.	2007-01-11
Floating body memory cell system and method of manufacture App 20060285422 - Scheuerlein; Roy E.	2006-12-21
Volatile memory cell two-pass writing method App 20060285423 - Scheuerlein; Roy E.	2006-12-21
TFT charge storage memory cell having high-mobility corrugated channel App 20060273404 - Scheuerlein; Roy E.	2006-12-07
Methods and apparatus for dynamically reconfiguring a charge pump during output transients App 20060250177 - Thorp; Tyler J. ; et al.	2006-11-09
Decoding circuit for non-binary groups of memory line drivers App 20060221702 - Scheuerlein; Roy E. ; et al.	2006-10-05
Transistor Layout Configuration For Tight-pitched Memory Array Lines App 20060221758 - Petti; Christopher J. ; et al.	2006-10-05
Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers App 20060221752 - Fasoli; Luca G. ; et al.	2006-10-05
Method and apparatus for incorporating block redundancy in a memory array App 20060221728 - Fasoli; Luca G. ; et al.	2006-10-05
Nonvolatile phase change memory cell having a reduced thermal contact area App 20060157683 - Scheuerlein; Roy E.	2006-07-20
Write-once nonvolatile phase change memory array App 20060157682 - Scheuerlein; Roy E.	2006-07-20
Structure and method for biasing phase change memory array for reliable writing App 20060157679 - Scheuerlein; Roy E.	2006-07-20
Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operation App 20060145193 - So; Kenneth K. ; et al.	2006-07-06
Integrated circuit including memory array incorporating multiple types of NAND string structures App 20060146608 - Fasoli; Luca G. ; et al.	2006-07-06
Apparatus and method for memory operations using address-dependent conditions App 20060133125 - So; Kenneth K. ; et al.	2006-06-22
Method of programming a monolithic three-dimensional memory App 20060067127 - Fasoli; Luca G. ; et al.	2006-03-30
Word line arrangement having segmented word lines App 20050180244 - Scheuerlein, Roy E.	2005-08-18
Word line arrangement having multi-layer word line segments for three-dimensional memory array App 20050180248 - Scheuerlein, Roy E.	2005-08-18
Word line arrangement having multi-layer word line segments for three-dimensional memory array App 20050180247 - Scheuerlein, Roy E.	2005-08-18
Non-volatile memory cell comprising a dielectric layer and a phase change material in series App 20050158950 - Scheuerlein, Roy E. ; et al.	2005-07-21
Nand memory array incorporating multiple series selection devices and method for operation of same App 20050128807 - Chen, En-Hsing ; et al.	2005-06-16
High density contact to relaxed geometry layers App 20050127519 - Scheuerlein, Roy E. ; et al.	2005-06-16
Optimization of critical dimensions and pitch of patterned features in and above a substrate App 20050121790 - Cleeves, James M. ; et al.	2005-06-09
Memory array incorporating memory cells arranged in NAND strings App 20050122779 - Fasoli, Luca G. ; et al.	2005-06-09
NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same App 20050122780 - Chen, En-Hsing ; et al.	2005-06-09
Manufacturing method for integrated circuit having disturb-free programming of passive element memory cells App 20050101088 - Scheuerlein, Roy E. ; et al.	2005-05-12
Multiple twin cell non-volatile memory array and logic block structure and method therefor App 20050078514 - Scheuerlein, Roy E. ; et al.	2005-04-14
Apparatus and method for disturb-free programming of passive element memory cells App 20050073898 - Scheuerlein, Roy E. ; et al.	2005-04-07