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name:-0.013386011123657
name:-0.010584115982056
name:-0.00045919418334961
Scheideler; Dirk Patent Filings

Scheideler; Dirk

Patent Applications and Registrations

Patent applications and USPTO patent grants for Scheideler; Dirk.The latest application filed is for "wiring configuration of a bus system and power wires in a memory chip".

Company Profile
0.16.26
  • Scheideler; Dirk - Munich DE
  • SCHEIDELER; Dirk - Muenchen DE
  • Scheideler; Dirk - Munchen DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Wiring configuration of a bus system and power wires in a memory chip
Grant 9,508,407 - Kuzmenka , et al. November 29, 2
2016-11-29
Wiring Configuration Of A Bus System And Power Wires In A Memory Chip
App 20140247681 - KUZMENKA; Maksim ;   et al.
2014-09-04
Wiring configuration of a bus system and power wires in a memory chip
Grant 8,724,360 - Kuzmenka , et al. May 13, 2
2014-05-13
Wiring Configuration Of A Bus System And Power Wires In A Memory Chip
App 20130155752 - Kuzmenka; Maksim ;   et al.
2013-06-20
Memory system with extended memory density capability
Grant 8,271,827 - Bilger , et al. September 18, 2
2012-09-18
Method and apparatus for determining a skew
Grant 8,144,755 - Bruennert , et al. March 27, 2
2012-03-27
Multi-die memory, apparatus and multi-die memory stack
Grant 8,120,958 - Bilger , et al. February 21, 2
2012-02-21
Memory circuit
Grant 8,015,438 - Bruennert , et al. September 6, 2
2011-09-06
Apparatus and method for providing a signal for transmission via a signal line
Grant 7,936,201 - Prete , et al. May 3, 2
2011-05-03
Integrated circuit with wireless connection
Grant 7,928,525 - Bilger , et al. April 19, 2
2011-04-19
Method and apparatus for storage device with a logic unit and method for manufacturing same
Grant 7,920,433 - Bilger , et al. April 5, 2
2011-04-05
Method and device for generating a digital data signal and use thereof
Grant 7,902,876 - Scheideler , et al. March 8, 2
2011-03-08
Stacking Technique for Circuit Devices
App 20110034045 - Bilger; Christoph ;   et al.
2011-02-10
Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator
Grant 7,782,927 - Borker , et al. August 24, 2
2010-08-24
Apparatus and method for switching an apparatus to a power saving mode
Grant 7,721,130 - Prete , et al. May 18, 2
2010-05-18
Method For Controlling A Memory Module And Memory Control Unit
App 20090287957 - Bilger; Christoph ;   et al.
2009-11-19
Integrated circuit with wireless connection
App 20090267084 - Bilger; Christoph ;   et al.
2009-10-29
Integrated Circuit with Improved Data Rate
App 20090267678 - Bilger; Christoph ;   et al.
2009-10-29
Method And Device For Generating A Digital Data Signal And Use Thereof
App 20090243684 - Scheideler; Dirk ;   et al.
2009-10-01
DRAM with Page Access
App 20090190432 - BILGER; Christoph ;   et al.
2009-07-30
Memory Device, Method For Accessing A Memory Device And Method For Its Manufacturing
App 20090175115 - Bilger; Christoph ;   et al.
2009-07-09
Method And Apparatus For Storage Device With A Logic Unit And Method For Manufacturing Same
App 20090175100 - Bilger; Christoph ;   et al.
2009-07-09
Multi-die Memory, Apparatus and Multi-die Memory Stack
App 20090161401 - Bilger; Christoph ;   et al.
2009-06-25
Memory System With Extended Memory Density Capability
App 20090150710 - Bilger; Christoph ;   et al.
2009-06-11
Memory Circuit
App 20090144583 - Bruennert; Michael ;   et al.
2009-06-04
Method and Apparatus for Determining a Skew
App 20090141843 - Bruennert; Michael ;   et al.
2009-06-04
Method And Apparatus For Monitoring A Memory Device
App 20090129189 - Bilger; Christoph ;   et al.
2009-05-21
Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage
Grant 7,405,591 - Braun , et al. July 29, 2
2008-07-29
Apparatus and method for providing a signal for transmission via a signal line
App 20080155150 - Prete; Edoardo ;   et al.
2008-06-26
Concept For Interfacing A First Circuit Requiring A First Supply Voltage And A Second Supply Circuit Requiring A Second Supply Voltage
App 20080143386 - Braun; Georg ;   et al.
2008-06-19
Apparatus and method for switching an apparatus to a power saving mode
App 20080126816 - Prete; Edoardo ;   et al.
2008-05-29
Apparatus and method for transmitting signals over a signal line
App 20080123792 - Prete; Edoardo ;   et al.
2008-05-29
Memory buffer and method for buffering data
App 20080126624 - Prete; Edoardo ;   et al.
2008-05-29
Clock and data recovery circuit including first and second stages
App 20070183552 - Sanders; Anthony Fraser ;   et al.
2007-08-09
Clock and data recovery circuit having gain control
App 20070183553 - Sanders; Anthony Fraser ;   et al.
2007-08-09
Method and device for frequency division and demultiplexing
Grant 7,215,163 - Scheideler , et al. May 8, 2
2007-05-08
Method and apparatus for scanning a data signal based on a direction of phase difference
Grant 7,084,711 - Borker , et al. August 1, 2
2006-08-01
Method and device for frequency division and demultiplexing
App 20050134333 - Scheideler, Dirk ;   et al.
2005-06-23
Arrangement for generating a transmission clock signal and a reception clock signal for a transceiver
App 20050129099 - Borker, Philipp ;   et al.
2005-06-16
Method and apparatus for scanning a data signal
App 20050012834 - Borker, Philipp ;   et al.
2005-01-20

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