Scheffer; Louis K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Scheffer; Louis K..The latest application filed is for "method and apparatus for approximating diagonal lines in placement".

Company Profile

0.35.32

Scheffer; Louis K. - Campbell CA US
Scheffer; Louis K. - Los Altos Hills CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Robust design using manufacturability models Grant 8,898,617 - White , et al. November 25, 2	2014-11-25
Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs Grant 8,769,453 - Scheffer , et al. July 1, 2	2014-07-01
Aware manufacturing of integrated circuits Grant 8,713,484 - Scheffer , et al. April 29, 2	2014-04-29
Method and system for context-specific mask inspection Grant 8,407,627 - Pack , et al. March 26, 2	2013-03-26
Method And Apparatus For Approximating Diagonal Lines In Placement App 20120297354 - Scheffer; Louis K.	2012-11-22
Aware manufacturing of an integrated circuit Grant 8,302,061 - Fujimura , et al. October 30, 2	2012-10-30
Robust Design Using Manufacturability Models App 20120151422 - White; David ; et al.	2012-06-14
Method and apparatus for approximating diagonal lines in placement Grant 8,201,128 - Scheffer June 12, 2	2012-06-12
Method and system for incorporation of patterns and design rule checking Grant 8,136,056 - Scheffer , et al. March 13, 2	2012-03-13
Robust design using manufacturability models Grant 8,122,392 - White , et al. February 21, 2	2012-02-21
System and method for statistical design rule checking Grant 8,103,982 - Scheffer January 24, 2	2012-01-24
Aware Manufacturing Of An Integrated Circuit App 20110314436 - Fujimura; Akira ; et al.	2011-12-22
Manufacturing aware design and design aware manufacturing of an integrated circuit Grant 8,020,135 - Fujimura , et al. September 13, 2	2011-09-13
Method, system, and computer program product for determining three-dimensional feature characteristics in electronic designs Grant 7,962,866 - White , et al. June 14, 2	2011-06-14
Method, system, and computer program product for predicting thin film integrity, manufacturability, reliability, and performance in electronic designs Grant 7,937,674 - White , et al. May 3, 2	2011-05-03
Method, System, And Computer Program Product For Preparing Multiple Layers Of Semiconductor Substrates For Electronic Designs App 20110046767 - Scheffer; Louis K. ; et al.	2011-02-24
Method, system, and computer program product for preparing multiple layers of semiconductor substrates for electronic designs Grant 7,827,519 - Scheffer , et al. November 2, 2	2010-11-02
Supplant design rules in electronic designs Grant 7,814,447 - Scheffer , et al. October 12, 2	2010-10-12
Method and system for context-specific mask writing Grant 7,784,016 - Pack , et al. August 24, 2	2010-08-24
Aware Manufacturing Of Integrated Circuits App 20100180247 - Scheffer; Louis K. ; et al.	2010-07-15
Method, system, and computer program product for timing closure in electronic designs Grant 7,721,237 - Scheffer , et al. May 18, 2	2010-05-18
Manufacturing aware design of integrated circuit layouts Grant 7,712,064 - Scheffer , et al. May 4, 2	2010-05-04
Method and system for representing manufacturing and lithography information for IC routing Grant 7,627,847 - Scheffer December 1, 2	2009-12-01
Method for Accounting for Process Variation in the Design of Integrated Circuits App 20090199145 - Scheffer; Louis K.	2009-08-06
Method and System for Implementing a Complex System or Process App 20090164184 - Vucurevich; Ted ; et al.	2009-06-25
Physical integrated circuit design with uncertain design conditions Grant 7,546,562 - Scheffer June 9, 2	2009-06-09
Method and system for chip design using physically appropriate component models and extraction Grant 7,533,359 - Scheffer , et al. May 12, 2	2009-05-12
Method and System for Representing Manufacturing and Lithography Information for IC Routing App 20090077520 - Scheffer; Louis K.	2009-03-19
Method and System for Representing Manufacturing and Lithography Information for IC Routing App 20090077521 - Scheffer; Louis K.	2009-03-19
Robust Design Using Manufacturability Models App 20090031271 - White; David ; et al.	2009-01-29
Method for accounting for process variation in the design of integrated circuits Grant 7,474,999 - Scheffer January 6, 2	2009-01-06
Manufacturing Aware Design and Design Aware Manufacturing App 20080307371 - Fujimura; Akira ; et al.	2008-12-11
Method, System, And Computer Program Product For Determining Three-dimensional Feature Characteristics In Electronic Designs App 20080163142 - White; David ; et al.	2008-07-03
Method, System, And Computer Program Product For Predicting Thin Film Integrity, Manufacturability, Reliability, And Performance In Electronic Designs App 20080160646 - White; David ; et al.	2008-07-03
Method, System, And Computer Program Product For Concurrent Model Aided Electronic Design Automation App 20080162103 - White; David ; et al.	2008-07-03
Method, System, And Computer Program Product For Preparing Multiple Layers Of Semiconductor Substrates For Electronic Designs App 20080163139 - Scheffer; Louis K. ; et al.	2008-07-03
Method, System, And Computer Program Product For Timing Closure In Electronic Designs App 20080163148 - Scheffer; Louis K. ; et al.	2008-07-03
Supplant Design Rules In Electronic Designs App 20080163141 - Scheffer; Louis K. ; et al.	2008-07-03
Manufacturing aware design and design aware manufacturing Grant 7,395,516 - Fujimura , et al. July 1, 2	2008-07-01
Method And Apparatus For Approximating Diagonal Lines In Placement App 20080005711 - Scheffer; Louis K.	2008-01-03
Method and System for Context-Specific Mask Writing App 20070266364 - Pack; Robert C. ; et al.	2007-11-15
Method and System for Context-Specific Mask Inspection App 20070233419 - Pack; Robert C. ; et al.	2007-10-04
Method and apparatus for designing integrated circuit layouts Grant 7,254,798 - Scheffer , et al. August 7, 2	2007-08-07
Method and system for context-specific mask writing Grant 7,249,342 - Pack , et al. July 24, 2	2007-07-24
Method and system for context-specific mask inspection Grant 7,231,628 - Pack , et al. June 12, 2	2007-06-12
Automatic insertion of clocked elements into an electronic design to improve system performance Grant 7,207,024 - Scheffer April 17, 2	2007-04-17
Method and system for incorporation of patterns and design rule checking App 20070006114 - Scheffer; Louis K. ; et al.	2007-01-04
Method and system for chip design using physically appropriate component models and extraction App 20060265680 - Scheffer; Louis K. ; et al.	2006-11-23
System and method for statistical design rule checking App 20060265674 - Scheffer; Louis K.	2006-11-23
Method and system for increased accuracy for extraction of electrical parameters App 20060265677 - Scheffer; Louis K. ; et al.	2006-11-23
Manufacturing Aware Deisgn and Design Aware Manufacturing App 20060265679 - Scheffer; Louis K. ; et al.	2006-11-23
Method and apparatus for designing integrated circuit layouts Grant 7,082,588 - Scheffer , et al. July 25, 2	2006-07-25
Method for creating patterns for producing integrated circuits Grant 7,024,638 - Scheffer , et al. April 4, 2	2006-04-04
Method and apparatus for designing integrated circuit layouts App 20050246674 - Scheffer, Louis K.	2005-11-03
Method and apparatus for designing integrated circuit layouts App 20050246675 - Scheffer, Louis K.	2005-11-03
Method for creating patterns for producing integrated circuits App 20050015739 - Scheffer, Louis K. ; et al.	2005-01-20
Automatic insertion of clocked elements into an electronic design to improve system performance App 20040158806 - Scheffer, Louis K.	2004-08-12
Method and system for context-specific mask inspection App 20040133369 - Pack, Robert C. ; et al.	2004-07-08
Method for accounting for process variation in the design of integrated circuits App 20040122642 - Scheffer, Louis K.	2004-06-24
Method and system for context-specific mask writing App 20040107412 - Pack, Robert C. ; et al.	2004-06-03
Method and apparatus for reducing signal integrity and reliability problems in ICS through netlist changes during placement Grant 6,543,041 - Scheffer , et al. April 1, 2	2003-04-01
Hardware modeling system and method of use Grant 5,625,580 - Read , et al. April 29, 1	1997-04-29
Hardware modeling system and method of use Grant 5,353,243 - Read , et al. October 4, 1	1994-10-04

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