Schanzenbach; Erich C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schanzenbach; Erich C..The latest application filed is for "implementing automated identification of optimal sense point and sector locations in various on-chip linear voltage regulator designs".

Company Profile

2.9.4

Schanzenbach; Erich C. - Dover Plains NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Implementing automated identification of optimal sense point and sector locations in various on-chip linear voltage regulator designs Grant 10,467,372 - Umbarkar , et al. No	2019-11-05
Implementing Automated Identification Of Optimal Sense Point And Sector Locations In Various On-chip Linear Voltage Regulator Designs App 20190034573 - Umbarkar; Anurag P. ; et al.	2019-01-31
Evaluating on-chip voltage regulation Grant 9,607,118 - Balasubramanian , et al. March 28, 2	2017-03-28
Evaluating on-chip voltage regulation Grant 9,582,622 - Balasubramanian , et al. February 28, 2	2017-02-28
Electrostatic discharge failure avoidance through interaction between floorplanning and power routing Grant 7,496,877 - Huber , et al. February 24, 2	2009-02-24
Method and apparatus for performing power routing on a voltage island within an integrated circuit chip Grant 7,234,124 - Chen , et al. June 19, 2	2007-06-19
Electrostatic discharge failure avoidance through interaction between floorplanning and power routing App 20070035900 - Huber; Andrew D. ; et al.	2007-02-15
Method and apparatus for performing power routing on a voltage island within an integrated circuit chip App 20050120322 - Chen, Bing ; et al.	2005-06-02
Method and apparatus for performing power routing on a voltage island within an integrated circuit chip Grant 6,861,753 - Chen , et al. March 1, 2	2005-03-01
Method of automated design and checking for ESD robustness Grant 6,725,439 - Homsinger , et al. April 20, 2	2004-04-20
Method of analyzing integrated circuit power distribution in chips containing voltage islands Grant 6,631,502 - Buffet , et al. October 7, 2	2003-10-07
Method of analyzing integrated circuit power distribution in chips containing voltage islands App 20030135830 - Buffet, Patrick H. ; et al.	2003-07-17
Parallel approach to chip wiring Grant 5,631,842 - Habra , et al. May 20, 1	1997-05-20

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