loadpatents
name:-0.010114908218384
name:-0.0099341869354248
name:-0.0006871223449707
Sayah; Robert T. Patent Filings

Sayah; Robert T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sayah; Robert T..The latest application filed is for "method and system for comparing lithographic processing conditions and or data preparation processes".

Company Profile
0.9.6
  • Sayah; Robert T. - Poughkeepsie NY US
  • Sayah; Robert T. - Verbank NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Gridded glyph geometric objects (L3GO) design method
Grant 8,423,947 - Lavin , et al. April 16, 2
2013-04-16
Method and system for comparing lithographic processing conditions and or data preparation processes
Grant 8,381,141 - Fischer , et al. February 19, 2
2013-02-19
Method And System For Comparing Lithographic Processing Conditions And Or Data Preparation Processes
App 20120107969 - Fischer; Stephen E. ;   et al.
2012-05-03
Pseudo-string based pattern recognition in L3GO designs
Grant 7,823,094 - Finkler , et al. October 26, 2
2010-10-26
Graph-based pattern matching in L3GO designs
Grant 7,814,443 - Finkler , et al. October 12, 2
2010-10-12
Gridded Glyph Geometric Objects (l3go) Design Method
App 20090235215 - Lavin; Mark A. ;   et al.
2009-09-17
Graph-based Pattern Matching In L3go Designs
App 20080172645 - Finkler; Ulrich A. ;   et al.
2008-07-17
Pseudo-string Based Pattern Recognition In L3go Designs
App 20080165192 - Finkler; Ulrich A. ;   et al.
2008-07-10
Framework for hierarchical VLSI design
Grant 7,089,511 - Allen , et al. August 8, 2
2006-08-08
Framework for hierarchical VLSI design
App 20050132320 - Allen, Robert John ;   et al.
2005-06-16
Method for performing monte-carlo simulations to predict overlay failures in integrated circuit designs
Grant 6,892,365 - Culp , et al. May 10, 2
2005-05-10
Method For Performing Monte-carlo Simulations To Predict Overlay Failures In Integrated Circuit Designs
App 20040210863 - Culp, James A. ;   et al.
2004-10-21
Method for selecting hierarchical interactions in a hierarchical shapes processor
Grant 6,243,854 - Lavin , et al. June 5, 2
2001-06-05

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