Sawase; Terumi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sawase; Terumi.The latest application filed is for "semiconductor device".

Company Profile

0.15.2

Sawase; Terumi - Hanno JP
Sawase; Terumi - Sayama JP
Sawase; Terumi - Hannou JP
Sawase; Terumi - Hachioji JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device Grant 6,862,220 - Kawahara , et al. March 1, 2	2005-03-01
Semiconductor device App 20040246780 - Kawahara, Takayuki ; et al.	2004-12-09
Semiconductor device Grant 6,785,165 - Kawahara , et al. August 31, 2	2004-08-31
Semiconductor device App 20030142550 - Kawahara, Takayuki ; et al.	2003-07-31
Single-chip semiconductor integrated circuit device and microcomputer integrated on a semiconductor chip Grant 5,784,637 - Sawase , et al. July 21, 1	1998-07-21
Method for flexibly developing a data processing system comprising rewriting instructions in non-volatile memory elements after function check indicates failure of required functions Grant 5,511,211 - Akao , et al. April 23, 1	1996-04-23
Single chip microprocessor for satisfying requirement specification of users Grant 5,426,744 - Sawase , et al. June 20, 1	1995-06-20
Semiconductor integrated circuit having semiconductor output device driving external load and microprocessor unit Grant 5,379,230 - Morikawa , et al. January 3, 1	1995-01-03
Single-chip microcomputer including non-volatile memory elements Grant 5,321,845 - Sawase , et al. June 14, 1	1994-06-14
Microprocessor and method for setting up its peripheral functions Grant 5,307,464 - Akao , et al. April 26, 1	1994-04-26
Microcomputer having a PROM including data security and test circuitry Grant 5,175,840 - Sawase , et al. December 29, 1	1992-12-29
Integrated circuit having processor coupled by common bus to programmable read only memory for processor operation and processor uncoupled from common bus when programming read only memory from external device Grant 5,088,023 - Nakamura , et al. February 11, 1	1992-02-11
Semiconductor logic device having two-dimensional logic arrays and logic cell chains alternately arranged Grant 4,982,114 - Nakamura , et al. January 1, 1	1991-01-01
Semiconductor integrated circuit with nonvolatile memory Grant 4,920,518 - Nakamura , et al. April 24, 1	1990-04-24
Semiconductor integrated circuit with nonvolatile memory Grant 4,821,240 - Nakamura , et al. April 11, 1	1989-04-11
Semiconductor integrated circuit with nonvolatile memory Grant 4,744,062 - Nakamura , et al. May 10, 1	1988-05-10
Electronic tuning type television receiver Grant 4,270,220 - Hagiwara , et al. May 26, 1	1981-05-26

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