| Patent | Date |
|---|
Data processor having cache memory
App 20070233959 - Hotta; Takashi ; et al. | 2007-10-04 |
Data processor having cache memory
Grant 7,240,159 - Hotta , et al. July 3, 2 | 2007-07-03 |
Data processor having cache memory
App 20050102472 - Hotta, Takashi ; et al. | 2005-05-12 |
Data processor having cache memory
Grant 6,848,027 - Hotta , et al. January 25, 2 | 2005-01-25 |
Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface
Grant 6,714,477 - Nakayama , et al. March 30, 2 | 2004-03-30 |
Data processor having cache memory
App 20030204676 - Hotta, Takashi ; et al. | 2003-10-30 |
Data processor having cache memory
Grant 6,587,927 - Hotta , et al. July 1, 2 | 2003-07-01 |
Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface
App 20020176308 - Nakayama, Michiaki ; et al. | 2002-11-28 |
Method and system for data transfer
Grant 6,442,223 - Dreps , et al. August 27, 2 | 2002-08-27 |
Semiconductor integrated circuit device with memory banks and read buffer capable of storing data read out from one memory bank when data of another memory bank is outputting
Grant 6,430,103 - Nakayama , et al. August 6, 2 | 2002-08-06 |
Data processor having cache memory
App 20010037432 - Hotta, Takashi ; et al. | 2001-11-01 |
Semiconductor integrated circuit
App 20010012232 - Nakayama, Michiaki ; et al. | 2001-08-09 |
Information processor for performing processing without register conflicts
Grant 6,101,596 - Tanaka , et al. August 8, 2 | 2000-08-08 |
Data processor with variable types of cache memories
Grant 5,848,432 - Hotta , et al. December 8, 1 | 1998-12-08 |
Floating-point addition/substraction processing apparatus and method thereof
Grant 5,684,729 - Yamada , et al. November 4, 1 | 1997-11-04 |
Input/output execution apparatus for a plural-OS run system
Grant 5,499,379 - Tanaka , et al. March 12, 1 | 1996-03-12 |
Information processing apparatus with address extension function
Grant 5,426,751 - Sawamoto June 20, 1 | 1995-06-20 |
I/O execution method for a virtual machine system and system therefor
Grant 5,392,409 - Umeno , et al. February 21, 1 | 1995-02-21 |
Multiple virtual storage system and address control apparatus having a designation table holding device and translation buffer
Grant 5,305,458 - Motomura , et al. April 19, 1 | 1994-04-19 |
Semiconductor integrated circuit device
Grant 5,291,445 - Miyaoka , et al. March 1, 1 | 1994-03-01 |
Data processing apparatus operable in extended or unextended virtual address spaces without software modification
Grant 5,287,475 - Sawamoto * February 15, 1 | 1994-02-15 |
Address translation apparatus in virtual machine system using a space identifier field for discriminating DATOFF (dynamic address translation off) virtual machines
Grant 5,129,071 - Yamagata , et al. July 7, 1 | 1992-07-07 |
I/O execution method for a virtual machine system and system therefor
Grant 5,109,489 - Umeno , et al. * April 28, 1 | 1992-04-28 |
Information processing system using domain table address extension for address translation without software modification
Grant 5,023,777 - Sawamoto June 11, 1 | 1991-06-11 |
Method and apparatus for generating a real address multiple virtual address spaces of a storage
Grant 4,985,828 - Shimizu , et al. January 15, 1 | 1991-01-15 |
I/O Execution method for a virtual machine system and system therefor
Grant 4,885,681 - Umeno , et al. December 5, 1 | 1989-12-05 |
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